Electricity: electrical systems and devices – Miscellaneous
Patent
1987-07-06
1989-01-31
Kucia, R. R.
Electricity: electrical systems and devices
Miscellaneous
361407, 361412, 361414, H05K 118
Patent
active
048020621
ABSTRACT:
An integrated (silicon based) packaging/wiring structure provides for VLSI chips 4 to be placed within openings of somewhat larger size in a semiconductor interconnection wafer (IW, 2) supported by a carrier 1. The interconnection wafer 2 includes multilevel (ML) wiring planes and incorporated circuit components integrated in a less demanding technology as compared to the VLSI chips 4. Silicon contact chips 5 with conductive surface layers 22, 23 placed over the chip/IW plane provide for the required interconnections by means of needle-like structures 24 inserted in corresponding via holes. The needles are better suited to withstand shear strain than are conventional C-4 (Controlled Collapse Chip Connection) joints. Consequently a much higher number of chip pads can be provided. Power supply is effected via rather large-dimensioned conductive planes, e.g. in the form of Cu rails 20, running within the carrier 1 and surfacing stud-like (at 21) in the peripheral region of said openings in the interconnection wafer 2 for further distribution via the contact chip 5. The wiring system can be supplemented, if required, with an additional wiring wafer 6.
REFERENCES:
patent: 3777221 (1973-12-01), Tatsuko et al.
patent: 4074342 (1978-02-01), Honn et al.
patent: 4288841 (1981-09-01), Gogal
patent: 4328530 (1982-05-01), Bajorek
patent: 4445112 (1984-04-01), Haville
patent: 4598308 (1986-07-01), James et al.
patent: 4598337 (1986-07-01), Wutrich et al.
patent: 4645943 (1987-02-01), Smith et al.
patent: 4653822 (1987-03-01), Kanazawa
patent: 4688151 (1987-08-01), Kraus et al.
patent: 4705917 (1987-11-01), Gates et al.
A. Truchi, Two-Level Printed Circuit Board, IBM. Tech. Disc. Bull., vol. 14 #11, Apr. 1972, p. 3482 relied on.
Blum Arnold
Briska Marian
Najmann Knut
International Business Machines Corp.
Kucia R. R.
Meyers Steven J.
Yee Yen S.
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