Data processing: structural design – modeling – simulation – and em – Simulating nonelectrical device or system
Patent
1997-10-01
2000-10-03
Teska, Kevin J.
Data processing: structural design, modeling, simulation, and em
Simulating nonelectrical device or system
G06G 748
Patent
active
061285889
ABSTRACT:
An integrated wafer fab production characterization and scheduling system incorporates a manufacturing execution system with a scheduling system based on simulation. The integrated characterization/scheduling system provides manufacturing with a simulation tool integrated with the manufacturing execution system to evaluate proposed production control logic as a practical alternative to expensive experimentation on actual production system. Furthermore, simulation models are used to create short term dispatch schedules to steer daily manufacturing operations towards planned performance goals. Innovative features include integration of preventive maintenance scheduling, Kanban based WIP control, an integrated time standard database, a, and real time lot move updates.
REFERENCES:
patent: 5396432 (1995-03-01), Saka et al.
patent: 5479343 (1995-12-01), Matoba et al.
patent: 5751580 (1998-05-01), Chi
Levitt et al.; "Just-in-Time Methods for Semiconductor Manufacturing"; IEEE Advanced Semiconductor Manufact, Workshop; pp. 3-9, Sep. 1990.
Stone et al.; "Designing Time Critical Systems with TACT"; IEEE Euromicro Workshop on Real Time; pp. 74-82, Jun. 1989.
Corbett et al.: "Modeling Just-in-Time Production Systems: a Critical Review"; IEEE Winter Simulation Conf.; pp. 819-828, Dec. 1993.
Jones Hugh
Kananen Ronald P.
Sony Corporation
Sony Electronics Inc.
Teska Kevin J.
LandOfFree
Integrated wafer fab time standard (machine tact) database does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated wafer fab time standard (machine tact) database, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated wafer fab time standard (machine tact) database will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-204421