Computer graphics processing and selective visual display system – Computer graphic processing system – Interface
Patent
1994-11-16
1999-12-14
Chauhan, U.
Computer graphics processing and selective visual display system
Computer graphic processing system
Interface
345202, 345509, G06F 1316
Patent
active
060024119
ABSTRACT:
An integrated memory controller (IMC) which incorporates novel memory, graphics, and audio processing capabilities in a single logical unit. The IMC includes numerous significant advances which provide greatly increased performance over prior art systems. The integrated memory controller (IMC) includes one or more symmetric memory ports for connecting to system memory. The IMC also includes video outputs, preferably RGB (red, green, blue) outputs as well as horizontal and vertical synchronization signal outputs, to directly drive the video display monitor. The IMC transfers data between the system bus and system memory and also transfers data between the system memory and the video display output, thereby eliminating the need for a separate graphics subsystem. The IMC also improves overall system performance and response using main system memory for graphical information and storage. The IMC system level architecture reduces data bandwidth requirements for graphical display data since the host CPU is not required to move data between main memory and the graphics subsystem as in conventional computers, but rather the graphical data resides in the same subsystem as the main memory. Therefore the host CPU or DMA master is not limited by the available bus bandwidth. The IMC includes compression and decompression engines for compressing and decompressing data within the system. The IMC also includes a novel pointer-based display list architecture which includes windows workspace areas spaces which define the format of the data and the data type to read or written.
REFERENCES:
patent: 4542376 (1985-09-01), Bass et al.
patent: 4679038 (1987-07-01), Bantz et al.
patent: 4868557 (1989-09-01), Perlman
patent: 4945499 (1990-07-01), Asari et al.
patent: 4967375 (1990-10-01), Pelham et al.
patent: 5043714 (1991-08-01), Perlman
patent: 5097411 (1992-03-01), Doyle et al.
patent: 5113180 (1992-05-01), Gupta et al.
patent: 5142615 (1992-08-01), Levesque et al.
patent: 5175813 (1992-12-01), Golding et al.
patent: 5258750 (1993-11-01), Malcolm, Jr. et al.
patent: 5265218 (1993-11-01), Testa et al.
patent: 5315696 (1994-05-01), Case et al.
patent: 5321805 (1994-06-01), Hayman et al.
patent: 5369617 (1994-11-01), Munson
patent: 5388207 (1995-02-01), Chia et al.
patent: 5392407 (1995-02-01), Heil et al.
patent: 5412776 (1995-05-01), Bloomfield et al.
patent: 5432900 (1995-07-01), Rhodes et al.
patent: 5467087 (1995-11-01), Chu
patent: 5502462 (1996-03-01), Mical et al.
patent: 5506604 (1996-04-01), Nally et al.
patent: 5522025 (1996-05-01), Rosenstein
patent: 5528764 (1996-06-01), Heil
patent: 5559954 (1996-09-01), Sakoda et al.
patent: 5563595 (1996-10-01), Strohacker
patent: 5590287 (1996-12-01), Zeller et al.
patent: 5596345 (1997-01-01), Goodfellow
patent: 5596693 (1997-01-01), Needle et al.
patent: 5606428 (1997-02-01), Hanselman
patent: 5608864 (1997-03-01), Bindlish et al.
patent: 5617529 (1997-04-01), Dao
patent: 5659715 (1997-08-01), Wu et al.
patent: 5666521 (1997-09-01), Marisetty
patent: 5668997 (1997-09-01), Lynch-Freshner et al.
patent: 5706034 (1998-01-01), Katsura et al.
patent: 5719598 (1998-02-01), Latham
patent: 5734387 (1998-03-01), Patrick et al.
patent: 5761698 (1998-06-01), Combs
patent: 5812817 (1998-09-01), Hovis et al.
patent: 5828877 (1998-10-01), Pearce et al.
Watkins, John et al., "A Memory Controller with an Integrated Graphics Processor", Computer Design--'93, 1993, pp. 324-338, 1993.
XP-002088244 "Un circuit video de memorisation et de visualisation d'objets", Electonique Industrielle, Apr. (1985), No. 87, Paris, France, pp. 51-59.
"Buffer Mechanism For PEL Positioning of Multiple Video Images, Including Overlapping, on a Raster-Scan CRT," IBM Technical Disclosure Bulletin, vol. 29, No. 11, Apr. 1987, pp. 4714-4717.
International Search Report for PCT/US 98/13113 dated Jan. 12, 1999.
Chauhan U.
Hood Jeffrey C.
Interactive Silicon, Inc.
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