Integrated surface metrology

Details Integrated surface metrology Integrated surface metrology

2000-02-01

2004-02-10

Pham, Hoa Q. (Department: 2877)

Optics: measuring and testing

Shape or surface configuration

C356S369000, C356S511000

Reexamination Certificate

active

06690473

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates to methods and apparatus for surface metrology in general, and more particularly to methods and apparatus for integrated surface metrology.
2. Description of the Related Art
In order to achieve smaller device sizes, the microelectronics industry is moving towards the use of a dual Damascene process with typically more than five layers of copper interconnects. To implement a dual Damascene process, Chemical Mechanical Polishing (CMP) of copper in an environment with mixed copper and dielectric circuit underlying structures is a critical technology.
In the overall process flow for integrated circuit manufacturing, arrays of alternating lines of copper and spaces of oxide are built-up on wafers in order to construct electrical circuits. In the building-up process, both copper circuit lines and the oxide spaces that separate copper circuit lines are covered with copper just prior to a CMP step. That is, the entire wafer surface is covered with copper with oxide structures buried beneath a covering layer. The CMP process step then removes the copper above the oxide spaces without over-polishing or under-polishing. In the art, over-polishing refers to stopping the polishing process after the copper over the oxide spaces has been cleared and under-polishing refers stopping the polishing process before the copper over the oxide is cleared. In practice, slight over-polishing may be necessary to prevent device failures caused by excess copper acting to bridge lines and spaces. Such bridging provides a current path between adjacent lines and causes electrical short circuits.
While slight over-polishing may be necessary to avoid short circuits, even slight over-polishing introduces significant problems to the realization of the technology. During over-polish, both copper metal and dielectric are exposed and polished. Since copper polishes at much greater rate than dielectric material, a wafer's surface may tend to be non-planar at the conclusion of a CMP processing step. Further, excessive over-polishing may also give rise to excessive dishing and erosion of the wafer surface. Dishing is the difference in the level between the top surface of a copper line and the top surface of the neighboring oxide. Erosion refers to the level of oxide spaces compared to neighboring ‘field oxide’ that is not broken up by copper lines. Non-planarity introduced by dishing, erosion or otherwise, causes further problems that degrade device performance and make subsequent process steps more difficult. For example, structures do not have the proper electrical resistance or capacitance when non-planar. Also, optical depth of focus for a subsequent photo-lithography step is adversely affected, especially as device sizes shrink [4]. Further, the non-planar structure may cause a following CMP step to produce unwanted ‘puddles’ of copper in the depressions that can cause electrical short circuits.
Proper realization of copper CMP, then, carefully optimizes the amount of polishing to balance the conflicting goals of avoiding residual copper due to under-polishing and avoiding dishing and erosion due to over-polishing. The problem of realizing the technology is further complicated by the fact that the polishing rate is variable across the wafer; variable from wafer-to-wafer and wafer lot-to-wafer lot. Properties of polishing slurries, polishing pads, and wafer patterns also vary. Thus, in practical application, the correct amount of polishing to apply to a wafer is not known, a priori. What is needed is integrated metrology measurements of relevant parameters to enable adequate control the CMP process during polishing.
Prior art devices for wafer metrology fall into three general catagories: integrated thin-film thickness metrology systems (ITMs); stylus profilometers, including mechanical profilers and atomic force microscopes (AFM); and combined interferometers/optical microscopes. As described below, prior art devices are inadequate for the problem at hand.
Prior art integrated thin-film thickness metrology systems (ITMs) are typified by those manufactured by: Nova® Instruments (Israel); Nanometrics U.S.); and Dainippon Screen Mfg. Co., (Japan). ITM machines measure the thickness of transparent films at predetermined sites by optical methods. The devices typically include: a reflectance spectrometer; an algorithm for ‘inverting’ measured reflectance to infer film thickness; a robotic system for vision and motion control; and a training procedure for instructing the instrument where to measure the thickness. Prior art ITMs specifically address the needs for inspection of dielectric CMP by measuring the starting pre-CMP and post-CMP thickness of transparent dielectric layers, such as SiO
2
(‘oxide’). The Nova® instrument is capable of measuring the wafers while they are wet. The remaining above-identified prior art instruments operate under dry wafer conditions. It is noteworthy that each and every of the above-identified prior art devices measure the thicknesses of locally uniform thin films. None measures profiles across a wafer.
Stylus profilometry, either with mechanical profilers or atomic force microscopes (AFM), measures profiles across wafers. In this type, the KLA-Tencor HRP machine has become an industry standard due to its high precision and long scan capabilities. Typical scans with the HRP take 10 seconds or more, for a single line scan. In general, profilers of this type are sensitive to vibration, and are typically mounted on dedicated vibration-damping supports. The instruments are typically used for test and development purposes, not on the manufacturing floor. Moreover, these instruments are implemented as standalone metrology tools, not suitable for integration into a CMP machine.
Numerous microscopic optical profiling methods utilize interferometry. Most are suitable for profiling optically homogeneous and simple surfaces. A homogeneous, rough surface is one whose optical properties from point-to-point are substantially invariant, but whose surface height relative to a reference varies with position. An example is a rough surface of a homogeneous volume of a material like either silicon dioxide (‘oxide’) or copper. The term-of-art, “profiling,” here refers to measuring the relative heights of two or more points on the rough surface. A simple surface is one whose reflectivity depends only on the optical properties of the ambient medium and the optical properties of the object at the surface.
Some prior art optical profilers are suitable for optically heterogeneous surfaces. Jennewein et al. [20] measured profiles on simple, heterogeneous, rough surfaces (for example, gold lines on a glass substrate) with optical profiling. The absorption properties and thickness of the gold was such that light does not penetrate through the gold and back to the top surface after reflection at a gold-glass interface. Thus, the reflectivity of the gold surface in contact with the air depended only on the optical properties of the gold at that surface, and not on the thickness of the gold or on the optical properties or thickness of the glass substrate. The substrate, in turn, was presumed to be thicker than the correlation length of the optical interferometer so that was effectively infinite in extent. As a result, the reflectivity of the substrate was dependent on the optical properties of the glass at its surface. Jennewein combined measurements from an ellipsometer to measure the optical properties of the surface with phase profiles from a common-path interferometer to yield an optical profile of the surface that closely matched a mechanical profile of the same surface.
As can readily be appreciated by one skilled in the art, the prior art in optical profilometry does not address the case of relevance in copper CMP-related applications. In the prior art, the incident light did not penetrate the surface sufficiently to interact with another structure. In copper CMP applications, the polished surface and underlying oxide structur

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