Integrated stacked capacitor and method of fabricating same

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S535000

Reexamination Certificate

active

10850797

ABSTRACT:
An integrated stacked capacitor comprises a first capacitor film (46) of polycrystalline silicide (poly), a second capacitor film (48) and a first dielectric (26) sandwiched between the first capacitor film (46) and second capacitor film (48). A second dielectric (34) and a third capacitor film (50) are provided. The second dielectric (34) is sandwiched between the second capacitor film (48) and third capacitor film (50). A method for fabrication of an integrated stacked capacitor comprises the following sequence of steps: applying a polysilicide layer (20) to form the first capacitor film (46); applying a first dielectric (26); applying a first metallization layer (28) to form the second capacitor film (48); applying a second dielectric (34); and applying a second metallization layer (34) to form the third capacitor film (50).

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patent: 2002/0056869 (2002-05-01), Morimoto
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patent: 1 205 976 (2002-05-01), None
IBM Technical Disclosure Bulletin, vol. 17, No. 6, pp. 1569-1570, by Arzubi et al., Nov. 1974.

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