Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of...
Reexamination Certificate
2007-03-06
2007-03-06
Flynn, Nathan J. (Department: 2826)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
C257S192000, C257S493000
Reexamination Certificate
active
10625733
ABSTRACT:
An integrated semiconductor device containing semiconductor elements that have respective desired on-resistances and breakdown voltages achieves appropriate characteristics as a whole of the integrated semiconductor element. The integrated semiconductor device includes a plurality of semiconductor elements formed in a semiconductor layer and each having a source of an n type semiconductor, a drain of the n type semiconductor and a back gate of a p type semiconductor between the source and the drain. At least a predetermined part of the drain of one semiconductor element and a predetermined part of the drain of another semiconductor element have respective impurity concentrations different from each other.
REFERENCES:
patent: 5306656 (1994-04-01), Williams et al.
patent: 5548150 (1996-08-01), Omura et al.
patent: 5747850 (1998-05-01), Mei
patent: 5994756 (1999-11-01), Umezawa et al.
patent: 6037632 (2000-03-01), Omura et al.
patent: 6251730 (2001-06-01), Luo
patent: 6297108 (2001-10-01), Chu
patent: 6610570 (2003-08-01), Chen
patent: 6614089 (2003-09-01), Nakamura et al.
patent: 6624474 (2003-09-01), Kanekawa et al.
patent: 6642120 (2003-11-01), Terashima
patent: 6650001 (2003-11-01), Yamaguchi et al.
patent: 2002/0005562 (2002-01-01), Kim et al.
patent: 2002/0025632 (2002-02-01), Hayashi et al.
patent: 2002/0197812 (2002-12-01), Fan
patent: 2003/0132450 (2003-07-01), Minato et al.
patent: 2003/0148559 (2003-08-01), Onishi et al.
patent: 2003/0219945 (2003-11-01), Lee
patent: 2003/0227051 (2003-12-01), Kurosaki et al.
patent: 2003/0232490 (2003-12-01), Hayashi
patent: 452817 (1991-10-01), None
patent: 6-3129618 (1988-06-01), None
patent: 6-97438 (1994-04-01), None
patent: 6-318561 (1994-11-01), None
patent: 11-111855 (1999-04-01), None
patent: 363267 (1999-07-01), None
Ludikhuize, et al. “Extended (180V) Voltage in 0.6 μm Thin-Layer-SOI A-BCD3 Technology on 1 μm BOX for Display, Automotive & Consumer Applications” Proceedings of the 14th International Symposium on Power Semiconductor Devices & ICS, Santa Fe, NM (Jun. 4-7, 2002) pp. 77-80.
Nitta Tetsuya
Terashima Tomohide
Flynn Nathan J.
McDermott Will & Emery LLP
Renesas Technology Corp.
Sefer Ahmed N.
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