Integrated semiconductor circuit having an external contacting t

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357 71, H01L 2354, H01L 21441

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049125435

ABSTRACT:
An integrated semiconductor circuit including a substrate consisting of silicon having a heavily doped impurity layer formed thereon. An interconnect level consisting of aluminum or aluminum alloy is connected to the contact regions by means of an intermediate layer consisting of tantalum silicide. The tantalum content of the compound is greater than that required stoichiometrically to produce the intermetallic compound TaSi.sub.2. The interconnect level is preferably in the form of an aluminum or aluminum alloy-tantalum silicide double layer. The tantalum silicide layer simultaneously acts as a diffusion barrier and as a contacting material. The lifetime of the electrically conducting paths under temperature and current stress as well as the reliability of the contacts is significantly increased in VLSI circuits as a result of this metallization.

REFERENCES:
patent: 4201999 (1980-05-01), Howard et al.
patent: 4276557 (1981-06-01), Levinstein et al.
patent: 4385433 (1983-05-01), Ozawa
patent: 4389257 (1983-06-01), Geipel, Jr. et al.
"Refractory Silicides for Integrated Circuits"--Murarka--J. Vac. Sci. Technology, Jul./Aug. 1982, pp. 775-792.
"Refractory Silicides of Titanium and Tantalum for Low Resistivity Gates and Interconnects"--Murarka et al.--IEEE Journal of Solid--State Circuits, vol. SC--15, No. 4, Aug. 1982, pp. 474-482.
"Thin Solid Films", vol. 96, (1982), pp. 327-345.

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