Integrated semiconductor circuit device for generating a switchi

Details Integrated semiconductor circuit device for generating a switchi Integrated semiconductor circuit device for generating a switchi

1984-01-27

1986-09-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307291, 307441, 307469, 307585, 365200, H03K 3356, H03K 19003

Patent

active

046148817

ABSTRACT:
An integrated semiconductor circuit device for generating a switching control signal includes a fuse having one terminal connected to a power source, and the other terminal connected to a flip-flop circuit comprising a cross-connected pair of complementary MOS field effect transistor type inverters. The output of the flip-flop circuit can be used as the switching control signal for a semiconductor memory device having a redundant circuit.

REFERENCES:
patent: 4228528 (1980-10-01), Cenker et al.
patent: 4358833 (1982-11-01), Folmsbee et al.
patent: 4399372 (1983-08-01), Tanimoto et al.
patent: 4446534 (1984-05-01), Smith
patent: 4459685 (1984-07-01), Sud et al.
"Redundancy Techniques for Fast Static RAMs", IEEE International Solid-State Circuits Conference, Kokkonen et al, Feb. 18, 1981.
"A 128K EPROM with Redundancy", Spaw et al, IEEE International Solid-State Circuits Conference, Feb. 11, 1982.
Haraszti, "Associative Control for Fault-Tolerant CMOS/SOS RAMs", 7th European Solid-State Circuits Conf., Freiburg, Germany 22-24 Sep. 1981.
Minato et al, "A Hi-CMOSII 8k.times.8b Static RAM", ISSCC 82, Feb. 12, 1982, Digest of Technical Papers, pp. 256-257.

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