Active solid-state devices (e.g. – transistors – solid-state diode – Schottky barrier
Reexamination Certificate
2002-10-30
2004-09-07
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Schottky barrier
C257S449000, C257S478000, C257S472000, C257S483000, C257S484000, C257S473000, C257S476000, C257S480000, C257S485000
Reexamination Certificate
active
06787871
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an integrated Schottky barrier diode chip made of a compound semiconductor for use in a high frequency circuit, specifically to an integrated Schottky barrier diode chip that includes an insulating region electrically separating portions of a diode of the chip, and a manufacturing method thereof.
2. Description of the Related Art
The demand for high frequency devices has been increasing in recent years because of the worldwide expansion of the portable telephone market as well as the increased demand for digital satellite receiving/sending equipment. Many of these devices utilize a field effect transistor (FET) made of a compound semiconductor, such as gallium arsenide (GaAs), which is suitable for use in a high frequency range. Typical example of such devices include a monolithic microwave integrated circuit (MMIC) that integrates the FETs, a local oscillation FET and a GaAs-based Schottky barrier diode that is used for sending/receiving station in wireless communication.
FIG. 1A
is a plan view of a conventional integrated Schottky barrier diode chip, and
FIG. 1B
is its equivalent circuit. This type of integrated Schottky barrier diode is referred to as a Tee type, and has two Schottky barrier diodes
40
a
,
40
b
integrated in a chip. This chip also has a common electrode
36
a
and its related terminal
34
, a cathode electrode
36
b
and its related terminal
35
, and an anode electrode
36
c
and its related terminal
32
. These electrodes
36
a
,
36
b
,
36
c
are indicated by the areas encircled by unevenly broken lines in the figure.
The two Schottky barrier diodes
40
a
,
40
b
share the common electrode
36
a
. In other words, the common electrode
36
a
serves as a cathode electrode of the Schottky barrier diode
40
a
, the anode of which is the anode electrode
36
c
, and serves as an anode of the Schottky barrier diode
40
b
, the cathode of which is the cathode electrode
36
b
. The terminals are the areas of the corresponding electrodes that are used for external connection. Typically, those are the areas for wire bonding, and indicated by the circles in FIG.
1
A.
This configuration provides a circuit shown in FIG.
1
B. Namely, the cathode of the Schottky barrier diode
40
a
, the anode of which is the anode terminal
32
, is connected to the anode of the Schottky barrier diode
40
b
, the cathode of which is the cathode terminal
35
.
FIG. 2
is a cross-sectional view of the integrated Schottky barrier diode chip of FIG.
1
A. This cross-section is along the arrow in FIG.
1
and intersects operation areas of the two diodes. An n+ epitaxial layer
22
(Si
+
5×10
18
cm
−3
) is disposed on an undoped GaAs substrate
21
and has a thickness of about 6 &mgr;m. An n epitaxial layer
23
(Si
+
1.3×10
17
cm
−3
) is disposed on the n+ epitaxial layer
22
and has a thickness of about 350 nm. This n epitaxial layer
23
serves as an operation layer of the Schottky barrier diodes. An ohmic electrode
28
is a disposed directly on the n+ epitaxial layer
22
and forms an ohmic contact with the n+ epitaxial layer
22
. This first metal layer is made of a AuGe/Ni/Au composite metal layer. A second metal layer
33
, made of Ti/Pt/Au composite layer, forms a Schottky contact with the n epitaxial layer
23
in a Schottky contact region
31
a
of the anode portion of the diode, and forms a contact with the ohmic electrode
28
in the cathode portion of the diode. A third metal layer
36
is a Au metal layer, which is formed by plating using the second metal layer
33
as a base electrode, and completely covers the second metal layer
33
. Portions
36
a
,
36
b
,
36
c
of the third metal layer
36
serve as the common electrode
36
a
, the cathode electrode
36
b
and the anode electrode
36
c
, respectively.
The Schottky contact region
31
a
has a circular shape with a diameter of about 10 &mgr;m, as shown in FIG.
1
. The first metal layer
28
surrounds the Schottky contact region
31
a
. The first and second metal layers are formed by vapor depositing the constituent metals separately. In the terminal areas
32
,
34
,
35
of the corresponding electrodes
36
c
,
36
a
,
36
b
, a lead wire is bonded to the electrode surface as shown by reference numerals
32
,
34
and
35
in FIG.
2
.
In the configuration of
FIG. 2
, the Schottky barrier diode on the left
40
b
has the cathode electrode
36
b
, which serves a cathode of this left diode and the common electrode
36
a
, which serves as an anode of this left diode, and the Schottky barrier diode on the right
40
a
has the anode electrode
36
c
, which serves an anode of this right diode and the common electrode
36
a
, which serves as a cathode of this right diode. Accordingly, the common electrode
36
a
works as an anode electrode of the diode
40
b
and a cathode electrode of the diode
40
a
. Furthermore, the second metal layer
33
on the Schottky contact regions
31
a
is at an anode voltage, and the n+ and n epitaxial layers are at a cathode voltage. In this structure, a polyimide layer
30
is required as an insulating layer under the second and third metal layers
33
,
36
, which are at the anode voltage, at locations in which the metal layers
33
,
36
intersect the portions of the epitaxial layers
22
,
23
, which are at the cathode voltage. The thickness of the polyimide layer
30
needs to be as much as 6-7 &mgr;m because this intersection area is large and the resultant parasitic capacitance must be reduced by increasing the thickness. Polyimide is used as the insulating layer because it has a low dielectric constant and suitable for a thick layer formation.
Furthermore, this configuration needs a trench
26
that separates the portions of the epitaxial layers
22
,
23
, which are at the cathode voltage, from the portions of the epitaxial layers
22
,
23
, which are at the anode voltage. This is an inevitable requirement when more than two diodes are formed in one chip. The trenches
26
reach the undoped gallium arsenide substrate
21
, and are filled with the same polyimide used for the polyimide layer
30
. The ohmic electrode
28
needs to form a direct contact with the n+ epitaxial layer for reducing the associated electric resistance. For this reason, a mesa etching is required to expose the n+ epitaxial layer
22
that is covered by the n epitaxial layer
23
. The n epitaxial layer
23
at the Schottky contact region is also required to be etched to precisely the thickness of 250 nm for good electric characteristics.
However, the Schottky barrier diode of the conventional configuration described above has a few disadvantages. First, further size reduction of the device is difficult because such a configuration needs a large positional error margin for absorbing mask misplacement during manufacturing due to the tall polyimide layer (6-7 &mgr;m) and the deep trenches (15 &mgr;m). Second, the trench structure requires an additional process step exclusively designed for trench formation, which needs to be added to a manufacturing method of a discrete device.
This invention is directed to an integrated Schottky barrier diode chip that is smaller and is fabricated by a simpler process than the conventional integrated Schottky barrier diode chip.
SUMMARY OF THE INVENTION
The invention provides an integrated Schottky barrier diode chip including a compound semiconductor substrate, an operation layer formed on the substrate, and a plurality of Schottky barrier diodes formed on the substrate. The device also includes an insulating region formed in the operation layer, which electrically separates a first portion of the operation layer of one of the plurality of Schottky barrier diodes from a second portion of the operation layer of that Schottky barrier diodes. The device further includes an impurity region formed in the operation layer, which electrically communicates with one of the first and second portions of the operation layer of that Schot
Asano Tetsuro
Hirata Koichi
Ishihara Hidetoshi
Murai Shigeyuki
Nakajima Yoshibumi
Jackson Jerome
Morrison & Foerster / LLP
Nguyen Joseph
Sanyo Electric Co,. Ltd.
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