Patent
1997-05-30
1999-02-02
Pan, Daniel H.
395881, 39520045, G06F 944, G06F 1320
Patent
active
058677240
ABSTRACT:
For use in an x86-compatible processor capable of executing MMX.TM. instructions calling for partitioned data to be shifted or routed, an integrated routing and shifting circuit, a method of operation and a computer system containing the same. In one embodiment, the circuit includes: (1) a lower shifter that receives partitioned data therein and shifts at least a first portion of the partitioned data as a function of a received control signal and (2) an upper shifter/router, coupled to the lower shifter and having partitioned input lines and partitioned output lines, that receives the partitioned data from the lower shifter into the source register and selectively shifts or routes at least a second portion of the partitioned data as a function of the received control signal while transferring the partitioned data from the partitioned input lines to the partitioned output lines.
REFERENCES:
patent: 5172381 (1992-12-01), Karp et al.
patent: 5379240 (1995-01-01), Byrne
patent: 5594911 (1997-01-01), Cruz et al.
Backgrounder, "Vproming pentium.RTM. Processor with MMX.sup..TM. Technology", Intel Internet publication, Oct. 22, 1996.
Maxin John L.
National Semiconductor Corporation
Pan Daniel H.
LandOfFree
Integrated routing and shifting circuit and method of operation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated routing and shifting circuit and method of operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated routing and shifting circuit and method of operation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1126516