Integrated RISC processor and GPS receiver

Details Integrated RISC processor and GPS receiver Integrated RISC processor and GPS receiver

1998-02-20

2000-05-23

Follansbee, John A.

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

712 42, 712218, 712234, G06F 1500

Patent

active

060676140

ABSTRACT:
An information processing apparatus including a Global Positioning System (GPS) receiver for receiving a radio wave from a GPS satellite and a Reduced Instruction Set Computer (RISC) type microprocessor for processing signals corresponding to the radio wave received by the GPS receiver. The GPS receiver and RISC type microprocessor are incorporated into a single integrated circuit chip, and the RISC type microprocessor is provided with a bypass circuit which facilitates the execution of conditional branch instructions.

REFERENCES:
patent: 5442577 (1995-08-01), Cohen
patent: 5566073 (1996-10-01), Margolin
Freet P: "The SH Microprocessor: 16-bit Fixed Length Instruction Set Provides Better Power and Die Size" Intellectual Leverage: Digest of Papers of the Spring Computer SOCI International Conference (COMPCON), San Francisco, Feb. 28, 1994, pp. 486-488, XP000479423.
S. B. Furber: "VLSI RISC Architecture and Organization" Marcel Dekker, Inc., New York, US, 1989, pp. 105-109, XP002120219.

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