Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Patent
1997-12-09
2000-01-25
Follansbee, John A.
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
712234, 364147, G06F 1578
Patent
active
060187972
ABSTRACT:
An integrated RISC and relay ladder logic processor uses shared registers, program counter, bus lines, and processing circuitry to eliminate delays associated with transfer of control in co-processor type architecture. The RISC instructions do not significantly interfere with the specialized hardware needed for rapid relay logic execution, the latter which may be further improved through the use of a pipeline well suited for relay ladder logic which creates few pipeline hazards. Two levels of condition codes are used for the arithmetic and logic instructions to permit nested arithmetic operations without interference with those instructions visible to the user. Hybrid instructions are provided to synchronize the relay ladder instructions with the arithmetic instructions, thus truly integrating the two instruction sets.
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Brooks Jeffery W.
Gunsaulus Richard S.
Schmidt Otomar
Schultz Ronald E.
Allen-Bradley Company LLC
Baxter Keith M.
Follansbee John A.
Horn John J.
Miller John M.
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