Integrated radiation hardened power mosgated device and...

Active solid-state devices (e.g. – transistors – solid-state diode – Schottky barrier – Specified materials

Reexamination Certificate

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C257S336000, C257S339000, C257S341000, C257S483000, C257S484000

Reexamination Certificate

active

06476456

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to an integrated power MOSFET and Schottky diode for operation in high radiation environments and more specifically relates to a novel rad hard structure in which the source pad region of a conventional MOSFET is used to form an integral Schottky diode in parallel with the MOSFET.
Semiconductor devices, and particularly power MOSFETs, require special manufacturing techniques to permit their operation in high radiation environments such as, but not limited to, those encountered in outerspace environments as by as orbiting satellites. U.S. Pat. Nos. 5,338,693 and 5,475,252 in the names of Merill and Spring, and U.S. patent application Ser. Nos. 09/020,837 filed Feb. 9, 1998 (IR-1444) in the names of Boden and Xu describe such MOSFETs.
The junction pattern of a typical power MOSFET having separate gate and source pad electrodes is shown in U.S. Pat. No. 4,789,882. This structure is made by a process used in non-radiation environments. Such devices have been modified in present day non-rad hard devices in having an “active” source in which the source connection bond wires or other electrodes can be connected directly to the source electrode above active junction areas.
It is also known that a Schottky diode can be integrated into a power MOSFET for certain circuit functions. U.S. Pat. No. 5,886,383 typically shows this integrated circuit.
BRIEF DESCRIPTION OF THE INVENTION
In accordance with the present invention, the structure of U.S. Pat. No. 4,789,882 the disclosure of which is incorporated by reference is modified to be manufactured with a “late gate” in which the gate oxide and gate electrode are formed late in the process and are not exposed to the high diffusion temperatures needed to form the base and source diffusion. Such processes are disclosed in U.S. Pat. Nos. 5,338,693 and 5,475,252 described above the disclosures of which are also incorporated herein by reference. It should be noted however that the present invention is also applicable to non-rad hard MOSgated devices such as Power MOSFET devices and IGBT devices with a separate source bond pad. The source pad area is then configured to define a Schottky diode. The Schottky diode is formed by making contact from the aluminum source directly to the underlying silicon, or alternatively, by inserting a lower work function material such as molybdenum or tungsten or the like between the aluminum source pad and the underlying silicon. The resulting device will be a single chip having an inherently parallel connected MOSFET and Schottky contact without using any of the available active source area of the device for the Schottky device.


REFERENCES:
patent: 4789882 (1988-12-01), Lidow
patent: 5338693 (1994-08-01), Kinzer et al.
patent: 5475252 (1995-12-01), Merrill et al.
patent: 5886383 (1999-03-01), Kinzer

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