Integrated programmable logic arrangement

Details Integrated programmable logic arrangement Integrated programmable logic arrangement

1976-04-28

1977-08-09

Yusko, Donald J.

Communications: electrical

Digital comparator systems

340173AM, G11C 802, G11C 1140

Patent

active

040414590

ABSTRACT:
An integrated programmable logic arrangement is provided into which a logic pattern can be electronically written, and out of which a logic pattern can be electronically read-out. The logic arrangement has an AND-matrix, an OR-matrix, switching transistors in the AND and OR matrices comprising MI.sub.1 I.sub.2 S (metal-insulation 1-insulation 2-semiconductor) storage type transistors, and decoder means connected to the AND and OR matrices.

REFERENCES:
patent: 3895360 (1975-07-01), Cricchi
patent: 3924243 (1975-12-01), Vermeulen
patent: 3936811 (1976-02-01), Horninger
patent: 3940740 (1976-02-01), Coontz

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