Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2002-11-08
2004-10-05
Thompson, Gregory D (Department: 2835)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C165S080300, C165S185000, C257S719000, C257S713000, C361S707000, C361S710000, C361S715000, C361S719000, C361S785000, C361S790000, C361S749000
Reexamination Certificate
active
06801431
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system architecture for arranging power conversion, power interconnect and power dissipation elements associated with high performance microprocessors onto a computer's main board in a compact form factor.
2. Description of the Related Art
In high density, high power devices such as microprocessors for servers and desktop systems it is often difficult to adequately interconnect power conversion modules close to the devices loads due to thermal, mechanical, and other constraints. This is because the power in such devices often requires large heatsinks, which encroach on the power conversion modules and force the power conversion to be further away than desired. Thus, what often results are high static and dynamic voltage drops across the power interconnect, due to high currents and high slew-rate switching of the microprocessor load, potentially resulting in false switching of the device itself which may corrupt data. Furthermore, the thermal management of the microprocessor and the power conversion module is usually handled separately resulting in high costs and inefficient packaging volumes. Therefore, it is seen that there is a need to bring the power regulation circuitry closer to the load while reducing the interconnect impedance and combining the thermal management of both the microprocessor and the power regulation circuitry all within a small form factor and easy to assemble construction which is of reasonably low cost.
SUMMARY OF THE INVENTION
The present invention is described by an integrated electronic assembly. The electronic assembly comprises a heat dissipating device, a power conditioning circuit board, a power dissipating device mounted on a substrate, and a power interconnect assembly. The power conditioning circuit board includes a first side thermally coupled to the heat dissipating device, a power conditioning circuit for producing a conditioned power signal, and an aperture. The power dissipating device has a top surface thermally coupled to the heat dissipation device through the aperture. The substrate includes at least one power conductor disposed proximate at least one of the edges of the substrate. The power interconnection assembly, which electrically couples the conditioned power signal to the substrate and provides substantially all power to the substrate, includes an edge connector assembly removably coupled to the at least one edge of the substrate.
REFERENCES:
patent: 5694297 (1997-12-01), Smith et al.
patent: 5704416 (1998-01-01), Larson et al.
patent: 5734555 (1998-03-01), McMahon
patent: 5738936 (1998-04-01), Hanrahan
patent: 5754412 (1998-05-01), Clavin
patent: 5783316 (1998-07-01), Colella et al.
patent: 5786075 (1998-07-01), Mishuku et al.
patent: 5794454 (1998-08-01), Harris et al.
patent: 5796582 (1998-08-01), Katchmar
patent: 5800905 (1998-09-01), Sheridan et al.
patent: 5801924 (1998-09-01), Salmonson
patent: 5815921 (1998-10-01), Burward-Hoy
patent: 5825630 (1998-10-01), Taylor et al.
patent: 5825633 (1998-10-01), Bujalski et al.
patent: 5842514 (1998-12-01), Zapach et al.
patent: 5856911 (1999-01-01), Riley
patent: 5864466 (1999-01-01), Remsberg
patent: 5898573 (1999-04-01), Fugaro
patent: 5904796 (1999-05-01), Freuler et al.
patent: 5905638 (1999-05-01), MacDonald, Jr. et al.
patent: 5920458 (1999-07-01), Azar
patent: 5930115 (1999-07-01), Tracy et al.
patent: 5945217 (1999-08-01), Hanrahan
patent: 5956835 (1999-09-01), Aksu
patent: 5966294 (1999-10-01), Harada et al.
patent: 5974662 (1999-11-01), Eldridge et al.
patent: 5980267 (1999-11-01), Ayers et al.
patent: 5981869 (1999-11-01), Kroger
patent: 5982635 (1999-11-01), Menzies et al.
patent: 5986887 (1999-11-01), Smith et al.
patent: 5995370 (1999-11-01), Nakamori
patent: 6014313 (2000-01-01), Hesselbom
patent: 6031727 (2000-02-01), Duesman et al.
patent: 6037659 (2000-03-01), Weixel
patent: 6062302 (2000-05-01), Davis et al.
patent: 6092281 (2000-07-01), Glenn
patent: 6096414 (2000-08-01), Young
patent: 6131646 (2000-10-01), Kelley
patent: 6137693 (2000-10-01), Schwiebert et al.
patent: 6157544 (2000-12-01), Ferling et al.
patent: 6191475 (2001-02-01), Skinner et al.
patent: 6191945 (2001-02-01), Belady et al.
patent: 6222265 (2001-04-01), Akram et al.
patent: 6225566 (2001-05-01), Dienst
patent: 6226179 (2001-05-01), Lee
patent: 6231352 (2001-05-01), Gonzales
patent: 6237223 (2001-05-01), McCullough
patent: 6262887 (2001-07-01), Lee
patent: 6265672 (2001-07-01), Eum et al.
patent: 6285550 (2001-09-01), Belady
patent: 6297551 (2001-10-01), Dudderar et al.
patent: 6304450 (2001-10-01), Dibene et al.
patent: 6338634 (2002-01-01), Yu
patent: 0 582 145 (1994-02-01), None
patent: 0 717 443 (1996-06-01), None
patent: 0 910 235 (1999-04-01), None
patent: 0 920 055 (1999-06-01), None
patent: 2 722 334 (1996-01-01), None
patent: 57066654 (1982-04-01), None
patent: 58175851 (1983-10-01), None
patent: 1174427 (1989-07-01), None
patent: 03041753 (1991-02-01), None
patent: 08204304 (1996-08-01), None
patent: 08330699 (1996-12-01), None
patent: WO 96/23397 (1996-08-01), None
patent: WO 01/06821 (2001-01-01), None
patent: WO 01/33927 (2001-05-01), None
patent: WO 01/65344 (2001-09-01), None
patent: WO 01/67512 (2001-09-01), None
Chung, “Ball-Grid-Array Package Thermal Management,” 14th IEEE Semi-therm TM Symposium, 1998, 78-87.
XP000124263, IBM Tech Disc Bulletin, “Multiple Electronic Board . . . . System,” 1994, 33(3B):55-56.
IBM Corp. Technical Disclosure Bulletin, “Pin Fin Array Heat Pipe Apparatus,” Sep. 1994, vol. 37, No. 9, 1pp.
Broder James M.
Derian Edward J.
Dibene, II Joseph T.
Hartke David J
Incep Technologies, Inc.
Knobbe Martens Olson & Bear LLP
Thompson Gregory D
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