Integrated poly-phase fir filter in double-sampled analog to...

Details Integrated poly-phase fir filter in double-sampled analog to... Integrated poly-phase fir filter in double-sampled analog to...

2011-04-12

2011-04-12

Lauture, Joseph (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000

Reexamination Certificate

active

07924191

ABSTRACT:
A sigma delta analog to digital converter includes a clock operating at a conversion clock rate and first and second conversion paths. The first path includes a first sigma delta modulator configured to produce from an input analog signal a first bit stream at the clock rate, and a first digital filter configured to decimate the first bit stream. The second conversion path has a second sigma delta modulator configured to produce from the input analog signal a second bit stream separate from the first bit stream at the clock rate, and a second digital filter configured to decimate the second bit stream.

REFERENCES:
patent: 5793709 (1998-08-01), Carley
patent: 6239729 (2001-05-01), Takeuchi
patent: 6532370 (2003-03-01), Underbrink et al.
patent: 2007/0025691 (2007-02-01), Shoji et al.
Aziz, Pervez,et al.; “An Overview of Sigma-Delta Converters: how a 1-bit ADC achiees more than 16-bit resolution”; Department of Electrical & Systems Engineering, University of Pennsylvania, Year 1996; http://repository.upenn.edu/ese—papers/136; pp. 61-84 and coverpage.

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