Integrated PNP power bipolar transistor with low injection into

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With means to increase current gain or operating frequency

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257546, 257552, 257578, H01L 2972, H01L 2702, H01L 2704

Patent

active

051794322

ABSTRACT:
In one embodiment of the invention, a P buried region is formed in an N epitaxial layer and isolated from a P substrate by an N buried region. P+ emitters and P+ collectors are formed in the surface of the N epitaxial layer (acting as a base). The P buried region acts as a catch diffusion for minority hole carriers injected into the epitaxial layer by the surface emitters that escape collection by the surface P+ collectors and which would otherwise be injected into the substrate. The N buried region effectively isolates the P buried region from the P substrate and further blocks any minority carriers from being injected into the substrate. The P buried region also prevents the formation of a parasitic PNP transistor to the substrate of the integrated device. This further reduces substrate current and thus further reduces the possibility of noise and latchup. The resulting structure is an efficient high power integrated PNP bipolar transistor capable of being incorporated in integrated circuits with very sensitive low power logic devices.

REFERENCES:
patent: 4081697 (1978-03-01), Nakano
patent: 4272307 (1981-06-01), Mayrand
patent: 4979008 (1990-12-01), Siligoni et al.
Mike F. Chang et al., "Lateral HVIC with 1200-V Bipolar and Field Effect Devices," pp. 167-176 (reprint from IEEE Trans. Electron Devices, vol. ED-33, pp. 1992-2001, Dec. 1986).
B. Jayant Baliga, "Power Integrated Circuits--A Brief Overview," pp. 34-36 (reprint from IEEE Trans. Electron Devices, vol. ED-33, No. 12, pp. 1936-1939, Dec. 1986).

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