Integrated plating and planarization apparatus having a...

Chemistry: electrical and wave energy – Apparatus – Electrolytic

Reexamination Certificate

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C204S22400M, C204S212000, C204S222000, C205S133000, C205S143000, C205S096000

Reexamination Certificate

active

06776885

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor processing, and more particularly to an apparatus for plating and planarization of material on a semiconductor wafer.
BACKGROUND OF THE INVENTION
In the fabrication of semiconductor devices, deposition and selective removal of metallic layers are important processes. A typical semiconductor wafer has several layers of metal deposited or plated on its surface, with each successive layer being polished or etched before further layers are added. In particular, electroplating of copper on the wafer surface is a widely practiced process. Plating of copper (which generally produces a blanket layer of copper on the wafer) is typically followed by electroetching or chemical-mechanical polishing (CMP) to remove unwanted portions of the plated layer.
In a typical Cu plating process on a semiconductor wafer, the wafer surface is first coated with a barrier/liner layer to promote adhesion of the plated metal layer to the wafer and to prevent diffusion of the Cu into the semiconductor material. A seed layer is then deposited on the liner. The electroplated Cu coats the wafer surface and fills features (e.g. trenches) formed in the surface. The plated layer must be thick enough ensure that the trench is filled. The excess thickness, termed “overburden,” is then removed by electroetching or CMP. Often the entire plated layer above the wafer surface is removed so that copper metal remains only inside the trench; this may be done by polishing the wafer in a CMP apparatus until the original front surface of the wafer is exposed.
Plating and planarization of the metal layer are conventionally done in separate tools. As noted above, processing of a typical wafer requires several different plating steps, with each followed by a planarization step. A typical wafer therefore is processed multiple times in both the plating and planarization tools. This situation tends to limit the throughput of the manufacturing process, and accordingly increases the overall manufacturing cost.
U.S. Pat. No. 6,004,880, titled “Method of single step damascene process for deposition and global planarization,” suggests adapting a CMP apparatus to perform plating and polishing simultaneously. However, plating and polishing often require different process conditions (e.g. different mechanical force on the wafer surface), which cannot be obtained in a simultaneous process. Furthermore, if a polishing slurry containing an abrasive is combined with an electrolyte plating solution, abrasive particles may be trapped in the plated metal layer.
In order to perform plating uniformly on the wafer and with minimum overburden, it is desirable that the plating solution be delivered to the wafer in precise amounts in accordance with the location on the wafer. Such localized delivery of plating solution is not available in plating tools where the entire wafer is bathed or sprayed with solution simultaneously.
In recent applications of electroplating (such as damascene plating of on-chip interconnects), the continuing trend toward smaller electronic devices has led to a tendency use thinner conductive seed layers, or to eliminate the conductive layer and plate directly on the high-resistivity liner. The high active area density in damascene plating, the trend toward larger wafers, the need for higher plating rates and stringent requirements on thickness uniformity all contribute to the problem known in the art as the “terminal effect.” This effect is caused by the high ohmic potential drop within the seed layer and the plated deposit, and results in a non-uniform current distribution in the vicinity of the electrical contacts on the wafer. Within the electrolyte, in the space between the plating anode and the wafer surface being plated, the potential drop is linear; at the interface between the electrolyte and seed layer there is a sudden drop in potential, and there is a non-linear potential drop through the seed layer. The thin seed layer (or liner) often has very high resistivity, and the resistance of passing the plating current through the contact terminal is likewise very high. Accordingly, the resistance of the seed layer dominates the overall resistance of the plating circuit, and the high local current density in the vicinity of the contact terminal causes severe non-uniformity in the thickness of the plated metal. The terminal effect may result in very little metal being plated at the wafer center.
There remains a need for a wafer processing tool which integrates the features of electroplating and planarization tools, and thus can perform alternating electroplating and electroetching processes, together with CMP (particularly for copper layers), with optimized conditions for each process. There is also a need for a plating tool which permits localized delivery of plating solution to the wafer. In particular, there is a need for a plating tool which does not suffer from the terminal effect when very thin seed layers are used.
SUMMARY OF THE INVENTION
The present invention addresses the above-described need by providing an apparatus for performing electroplating of a metal layer on a substrate, where the electroplating is performed using a ring counterelectrode with a variable diameter.
The apparatus of the present invention includes a plurality of dispensing segments, each having at least one hole for dispensing an electroplating solution onto the substrate. The dispensing segments form a circular counterelectrode and are movable with respect to each other during an electroplating process, so that the anode has a variable diameter. The electroplating solution is thus dispensed on an annular portion of the substrate having a diameter corresponding to the diameter of the counterelectrode; accordingly, the variable-diameter counterelectrode permits localized delivery of the plating solution to the substrate. A carrier holds the substrate substantially parallel to the counterelectrode; the carrier rotates with respect to the counterelectrode and includes a plating cathode.
According to a first aspect of the invention, the apparatus has a plate parallel to the substrate, with each dispensing segment being attached to the plate and slidable with respect thereto along a radius of a circular anode. The dispensing segments may be electrically connected using a flexible conductor. Each dispensing segment is connected to a flexible tube for providing the electroplating solution thereto. According to another aspect of the invention, the dispensing segments are non-conductive, and an anode electrode is placed in contact with the electroplating solution.
The apparatus may perform an electroetching process as well as an electroplating process. When electroetching is performed, an electroetching solution is dispensed through the dispensing segments. Current is conducted between the cathode and the anode in a forward direction during an electroplating process and in a reverse direction during an electroetching process.
More generally, the dispensing segments of the present invention dispense a plating solution and/or an etching solution onto a substrate; the dispensing segments form a circular array and are movable with respect to each other during a plating or etching process so that the array has a variable diameter.
According to another aspect of the invention, each of the dispensing segments of the anode has a tapered profile in a direction along the circumference of the circular anode so that each segment has a narrow end and a wide end. The segments are arranged so that the narrow end of each segment is inserted into the wide end of the adjacent segment to form an overlap between adjacent segments; the diameter of the circular anode is varied by varying an amount of overlap of adjacent segments.
According to an additional aspect of the invention, the apparatus includes a polishing table and a polishing pad disposed thereon, for performing a planarization process on the substrate, such as CMP. The polishing table may be interposed between the substrate and the circular anode a

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