Integrated PCI buffer controller and XOR function circuit

Details Integrated PCI buffer controller and XOR function circuit Integrated PCI buffer controller and XOR function circuit

1997-10-02

1999-10-26

An, Meng-Ai T.

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

710101, 710104, 710131, 714 48, 714801, G06F 1500

Patent

active

059745304

ABSTRACT:
An integrated buffer controller and data function circuit includes a data function circuit that is controlled by addresses supplied to the circuit. The integrated buffer controller and data function circuit has a bus interface that is used to connect the circuit to a bus on which one or more host adapters are connected so that both the host adapters and a host computer can transfer data to and from the circuit, and supply addresses to control operation of this data function circuit. A data channel in the integrated buffer controller and data function circuit connects the bus interface to a buffer memory controller. The buffer memory controller has a buffer memory port that includes a data port, a memory address port, and a memory control port. A buffer memory is connected to the buffer memory port. A data function circuit in the buffer memory controller is coupled to a data function enable output line. The data function circuit is selectively connected to the data port by a signal on the data function enable output line. In one embodiment, the data channel is a slave data channel. The integrated buffer controller and data function circuit also includes a master data channel connecting the bus interface to the memory controller. The master data channel includes a DMA controller connected to the bus interface, and a master first-in-first-out memory circuit connected between the DMA controller and the buffer memory controller.

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