Integrated oscillator with reduced jitter

Oscillators – Combined with particular output coupling network

Reexamination Certificate

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Details

C331S158000, C331S1160FE, C331S10800D, C327S205000

Reexamination Certificate

active

06191659

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to an oscillator in an integrated circuit, which integrated circuit comprises: a first supply pin and a second supply pin for receiving a supply voltage; a first signal pin; a second signal pin; an amplifier having an input coupled to the first signal pin and having an output coupled to the second signal pin; a comparator having a first supply terminal coupled to the first supply pin, having a second supply terminal coupled to the substrate, having an input coupled to the first signal pin, and having an output for supplying an output signal; and a phase-shifting element.
Such an oscillator is known from the general state of the art. In such an oscillator the phase-shifting element, which together with other electronic components in the oscillator provides the generally known phase condition of oscillators having an external capacitor coupled between the first signal pin and the second power supply pin. In addition to the oscillator the integrated circuit also includes digital circuits. During change-over from a logic low level to a logic high level or vice versa these digital circuits produce a spurious voltage on the substrate. It is common practice to couple the second supply terminal of the comparator to the substrate by means of substrate contacts in order to preclude latch-up problems. The spurious voltage affects the decision level of the comparator. An adverse effect of this is that the oscillator signal is afflicted with jitter.
SUMMARY OF THE INVENTION
It is an object of the invention to provide an oscillator which exhibits less jitter.
To this end, according to the invention, the oscillator of the type defined in the opening paragraph is characterized in that the phase-shifting element comprises an integrated capacitor having a first electrode coupled to the input of the comparator and having a second electrode coupled to the substrate. Thus, it is achieved that the spurious voltage appears both on the input of the comparator and on the second supply terminal of the comparator. The decision level of the comparator is then no longer affected by the spurious voltage, so that the jitter of the oscillator is reduced considerably.
The oscillator is further characterized in that the comparator comprises a Schmitt trigger. As a result of the hysteresis in the Schmitt trigger the jitter is reduced even further.


REFERENCES:
patent: 5455542 (1995-10-01), Spence et al.
patent: 5739728 (1998-04-01), Kim
patent: 0486207A1 (1992-05-01), None

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