Oscillators – Solid state active element oscillator – Transistors
Reexamination Certificate
1999-09-30
2001-11-20
Grimm, Siegfried H. (Department: 2817)
Oscillators
Solid state active element oscillator
Transistors
C331S075000, C331S158000, C331S062000
Reexamination Certificate
active
06320473
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to oscillator circuits. More particularly, the invention is directed to an oscillator integrated circuit apparatus using high feedback amplification.
BACKGROUND OF THE INVENTION
Oscillator circuits have been known in the art for quite some time. Common applications include providing clock signals for integrated circuits, multiplexed displays, and counters. More complex applications range from digital signal processing to providing signals for the sample rates of A/D converters. The periodic signals provided by oscillator circuits have become as critical as power supplies used to power electronics.
Essentially, an oscillator circuit produces an output signal at a particular level having a certain period. Common configurations of oscillator circuits include state variable oscillators, Wien bridge oscillators, and Colpitts oscillators.
FIG. 1
is a simplified illustration of a crystal oscillator circuit commonly known in the art. The crystal oscillator includes a vibrating element or crystal Y
1
generally made of quartz, glass, silicon dioxide, etc. that is cut and polished to vibrate at a certain frequency (i.e., 32,768 MHZ, 100 MHZ, etc.). The crystal is a two terminal device consisting of the slice of quartz positioned between two conducting plates. The quartz crystal has a piezoelectric property that undergoes mechanical deformation in response to an electric field produced across the plates. From a terminal point of view, the crystal behaves as if it were a tuned RLC circuit. Crystals designed for oscillator circuits have very good stability with Q values greater than 10,000.
The circuit in
FIG. 1
includes an inverting amplifier A
1
with a feedback resistor R
1
for providing gain to the amplifier A
1
. Input capacitor C
1
and output capacitor C
2
are typically balanced for maintaining a voltage of V/2. With a potential across the terminals of Y
1
, and amplifier A
1
biased to become oscillatory, a small input level to amplifier A
1
produces an oscillating output signal. Amplifier A
1
is configured to be a high gain amplifier that operates at a resonant frequency determined by crystal Y
1
. The crystal oscillator circuit provides sustained oscillations having good stability characteristics for oscillatory control as well as for providing signals for high-performance processors.
Notwithstanding, oscillator circuits utilizing vibrating elements such as quartz have design limitations. One limitation is providing sufficient start-up voltage for amplifier A
1
to begin oscillations. With capacitors C
1
and C
2
having an evenly distributed voltage between the input and output terminals, a start-up voltage, usually in the form of noise, must be provided to begin oscillations. Varying battery life of electronic devices using low-voltage oscillation circuits put a constraint on providing enough start-up voltage to begin oscillations.
A further limitation of crystal oscillator circuits is the interaction of the vibrating crystal with the oscillating amplifier. Within crystal oscillator circuits, and in particular for low voltage oscillator circuits, the interaction between the crystal and the amplifier can lead to a residual periodic shifting, or jitter of the output signal which is very undesirable at higher frequencies.
There are additional design considerations when developing microelectronic oscillator circuits having high gain amplifiers. One fatalistic deficiency of using high gain feedback amplifiers in microelectronics is caused by leakage currents inherent to Field Effect Transistors (FETs).
FIG. 2A
is a simplified illustration of how leakage occurs in a FET. FET
200
includes a p-type substrate
201
having gate oxide
202
and gate
203
typically made of metal or doped polysilicon. The p-type substrate is doped having n+ source
204
and drain
205
areas. In this illustration, leakage occurs in two ways. The first leakage, I
subthreshold
occurs between the source and drain of the FET. In smaller geometry FETs, the potential barrier of the device is controlled by both the gate-to-source voltage V
GS
and the drain-to-source voltage V
DS
. If the drain voltage is increased, the potential barrier in the channel decreases, leading to drain-induced barrier lowering. This reduction in the potential barrier eventually allows electron flow between the source and drain, even if the gate to source voltage is less than the threshold voltage V
T
. The undesirable channel current that flows under this condition is a leakage current called subthreshold current, I
subthreshold
.
The second type of current leakage resident in FETs occurs due the reverse bias condition of the source/drain to p-type substrate junctions. The reverse conduction, I
reverser
, of each junction occurs mainly due to the reverse saturation current and the generation current which originate in the depletion regions of the source/drain p-type substrate junctions. This current is a function of the bias voltage present at the terminals V
D
and V
S
with respect to the p-type substrate.
Total leakage, therefore, is the combination of the leakage caused due to each of these elements as illustrated in
FIG. 2B
, which is the equivalent circuit of FIG.
2
A.
I
leakage
=I
subthreshold
+I
reverse
When leakage current associated with a FET is present, it places a constraint on the applicability of FETs within oscillator circuits. A common device used in microelectronic circuits is an ESD protection circuit for eliminating static discharge effects on FETs. Typically, ESD protection circuits are designed using FETs having minimal channel lengths (L) with a large widths (W). The ESD protection circuit is used to clamp the input signal level to a certain voltage in order to minimize the impact of the ESD. However, as the channel lengths FETs used within ESD protection circuits are reduced, larger values of I
subthreshold
leakage occurs within the circuit. In an oscillator circuit using an ESD protection circuit and a high gain amplifier, I
leakage
as little as 7 nA will render the oscillator useless.
Therefore, the present invention overcomes the design challenges presented by the above deficiencies and, more particularly, reduces the intrinsic effects associated with developing microelectronic devices having oscillator circuits.
SUMMARY OF THE INVENTION
The present invention overcomes the fundamental individual constraints of conventional oscillator circuits by providing an oscillator circuit having a coupling capacitor isolating the input terminal of a crystal element and the feedback resistor of a high gain inverting oscillating amplifier. By isolating the input terminal from the feedback resistor, the present invention overcomes the effects of undesirable offset voltages associated with leakage currents. The present invention further provides an oscillator circuit having an input capacitor that is smaller relative to the output capacitor, thus reducing the start-up voltage required to start oscillations within the oscillator circuit. Furthermore, the present invention reduces the effects of jitter at the output stage through providing a high level signal at the input of the inverting amplifier.
In one form, the invention relates to an integrated circuit apparatus comprising at least one input protection circuit, an element coupled to the at least one input protection circuit wherein the element is configured to resonate, an amplifier coupled to the element, the amplifier having a feedback network, and a coupling element coupled to the amplifier and the input protection circuit, wherein the coupling element reduces current leakage between the amplifier and the input protection circuit.
In another form, the invention relates to an oscillator circuit apparatus comprising an element having at least one terminal, wherein the element is configured to resonate, an oscillator having an input terminal and an output terminal, the input terminal coupled to the element, and an output stage coupled to the input terminal of the oscillator
Galanthay Theodore E.
Grimm Siegfried H.
Jorgenson Lisa K.
STMicroelectronics Inc.
Thoma Peter J.
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