Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2005-09-27
2005-09-27
Smoot, Stephen W. (Department: 2813)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S695000, C438S697000, C427S255370, C065S386000
Reexamination Certificate
active
06949392
ABSTRACT:
The integrated optical circuit of the present invention includes a substrate with a first cladding layer. A first core layer having one or more waveguiding elements is formed on the first cladding layer. A second cladding layer surrounds the waveguiding elements of the first core layer; the refractive index of the first and second cladding layers are selected to be less than the refractive index of the waveguiding element(s). Through simultaneous cladding material deposition and cladding material removal, the second cladding layer as deposited is substantially self-planarized, enabling further layers to be positioned on the second cladding layer without necessitating intermediate planarization. Further, the present invention permits planar waveguide cores having submicron core spacings to be covered by a subsequently-deposited cladding layer without cladding gaps, seams or other deleterious cladding defects.
REFERENCES:
patent: 5800621 (1998-09-01), Redeker et al.
patent: 5814564 (1998-09-01), Yao et al.
patent: 5885881 (1999-03-01), Ojha
patent: 5904491 (1999-05-01), Ojha et al.
patent: 5976993 (1999-11-01), Ravi et al.
patent: 6044192 (2000-03-01), Grant et al.
patent: 6122934 (2000-09-01), Narita et al.
patent: 6261957 (2001-07-01), Jang et al.
patent: 6335288 (2002-01-01), Kwan et al.
patent: 6411765 (2002-06-01), Ono
patent: 6705124 (2004-03-01), Zhong et al.
patent: 2002/0181829 (2002-12-01), Margalit et al.
patent: 2002/0191931 (2002-12-01), Ferm et al.
patent: 2003/0110808 (2003-06-01), M'Saad et al.
patent: 2003/0113085 (2003-06-01), M'Saad
patent: 2003/0235383 (2003-12-01), Gardner et al.
Nguyen, “High Density Plasma Chemical Vapor Deposition of Silicon-Based Dielectric Films for Integrated Circuits,” IBM J. Res. Dev., vol. 43, No. 1 / 2 Jan./Mar. 1999, pp 109-126.
Gill David M.
Johnson Frederick G
King Oliver S.
Little Optics Inc.
Smoot Stephen W.
LandOfFree
Integrated optical circuit with dense planarized cladding layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated optical circuit with dense planarized cladding layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated optical circuit with dense planarized cladding layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3372890