Integrated multilevel signal demultiplexor

Television – Synchronization – Sync separation

Reexamination Certificate

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C348S529000, C370S536000

Reexamination Certificate

active

06870569

ABSTRACT:
An integrated circuit with a signal demultiplexor for separating out two signals of different magnitudes from within a multiplexed signal without requiring a large capacitance for signal filtering. A multiple-threshold input comparator stage separates the multiplexed input signal into a first fully demultiplexed signal and a first partially demultiplexed signal. The first fully and partially demultiplexed signals are logically processed in an Exclusive-OR gate to produce a second partially demultiplexed signal which is then time-delayed and gated by the first fully demultiplexed signal. The resultant gated signal is low pass filtered to produce a second fully demultiplexed signal. In a video signal application, the multiplexed input signal would be a “sandcastle” signal containing both horizontal clamp and vertical synchronization signals, with the horizontal clamp signal component being greater in magnitude than the vertical synchronization signal component, and the resulting first and second fully demultiplexed signals would be the separated horizontal clamp and vertical synchronization signals, respectively.

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“150 MHz Video Controller with 12c-bus Data Sheet.” Philips Semiconductors, pp 1-55, Nov. 25, 1997.

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