Pulse or digital communications – Repeaters – Testing
Patent
1990-10-10
1993-11-23
Chin, Stephen
Pulse or digital communications
Repeaters
Testing
375 31, H04B 336
Patent
active
052651240
ABSTRACT:
A discrete integrated repeater device and port MAU/AUI functions shares resources among its several ports. The device includes a single multi-bit free running counter providing preselected timing intervals to a plurality of latches. A signal undergoing measurement clears the latch while a preselected timing signal sets the latch. Receipt of a timing signal at a set latch indicates success or failure of some particular condition under test. The device satisfies an IEEE 802.3 specification for execution of a link integrity test. The device is also able to selectively disable or enable the link integrity test function for particular ports. A plurality of latches, one associated with each port, is set upon carrier sense detection at the particular port. A token passing mechanism implemented with a daisy chained line coupled to each latch enables a polling of each latch to provide carrier sense information about each port in a serial format. The device shares a single PLL among all its ports by producing a logical sum of carrier sense inputs to enable activation of the PLL. A collision indication signal will override operation of the PLL to ensure data integrity and to allow the PLL to reacquire lock on its reference clock.
REFERENCES:
patent: 4825435 (1989-04-01), Amundsen et al.
patent: 4985892 (1991-01-01), Camarata
patent: 5034945 (1991-07-01), Kimoto et al.
Staab David
Vijeh Nader
Advanced Micro Devices , Inc.
Chin Stephen
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