Integrated MOS transistors having a gate metallization composed

Details Integrated MOS transistors having a gate metallization composed Integrated MOS transistors having a gate metallization composed

1986-05-27

1987-06-16

Edlow, Martin H.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

357 231, 357 2315, 427 93, 4271263, H01L 2348, H01L 2978

Patent

active

046739688

ABSTRACT:
Chemical reactions between a tantalum or tantalum silicide metallization layer and an underlying thin gate oxide are avoided by the interposition of an intermediate layer of oxygen-doped tantalum or tantalum silicide whose thickness amounts to about 1/20 to 1/5 of the layer thickness of the entire gate metallization. The metallization layer is produced by high-frequency sputtering in which oxygen is added at the beginning of the process and argon is used as a sputtering gas. Low specific resistance values are accomplished by means of this gate metallization.

REFERENCES:
patent: 4238439 (1981-08-01), Higashinakagawa
patent: 4282647 (1981-08-01), Richman
patent: 4285761 (1981-08-01), Fatula et al.
patent: 4288470 (1981-09-01), Bate et al.
patent: 4337476 (1982-06-01), Fraser et al.
IBM Technical Disclosure Bulletin, vol. 25, No. 4 "Enhanced Polycide Structure" by D. R. Campbell, (9/82).
Article by Oppolzer et al. in J. Vac. Sci. Technol. B(1984) pp. 630-635.
Article by S. P. Murarka et al. in J. Appl. Phys. 51 (1980), pp. 1593-1598.
Article by S. P. Murarka entitled "Silicides for VLSI Applications", Academic Press 1983, p. 30.
Article by S. P. Murarka in J. Vac. Sci. Technol., 17, Jul./Aug. 1980, pp. 775-792.

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