Integrated MOS driver stage with a large output signal ratio

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307581, H03K 301, H03K 1760

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active

044121393

ABSTRACT:
A driver stage formed in integrated MOS technology has a large output signal ratio but with reduced idle currents. First and second control stages are provided of MOSFETs series connected and with their outputs between the MOSFETs connecting to respective gates of an output stage also comprised of series connected MOSFETs. In the output stage, one of the MOSFETs has its channel resistance reduced and is parallel-connected with an additional MOSFET. A boot strap capacitor connects between a gate of the additional MOSFET and an output of the circuit.

REFERENCES:
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patent: 3700981 (1972-10-01), Masuhara et al.
patent: 3775693 (1973-11-01), Proebsting
patent: 3903431 (1975-09-01), Heeren
patent: 3995172 (1976-11-01), Freeman et al.
patent: 4063117 (1977-12-01), Laugesen et al.
patent: 4129794 (1978-12-01), Dickson et al.
patent: 4195352 (1980-03-01), Tu et al.
patent: 4264829 (1981-04-01), Misaizu
patent: 4296339 (1981-10-01), Murotani
Knepper, "Dynamic Depletion Mode: An E/D MOSFET Circuit Method for Improved Performance;" IEEE Journal of Solid-State Circuits, vol. SC-13, No. 5, Oct. 1978, pp. 542-548.

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