Integrated monolithic circuit having a test bus

Electricity: measuring and testing – Plural – automatically sequential tests

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371 251, G01R 3128

Patent

active

049183796

ABSTRACT:
For the testing of an integrated monolithic circuit (IC) the integrated monolithic circuit with a test bus which extends along a functional part of the circuit which is partitioned into macro circuits and which is coupled to the macro circuits, each macro circuit comprising a test interface circuit which is connected in series with test interface circuits of the other macro circuits; via the test interface circuits, the macro circuits can be coupled to the test bus. As a result, macro circuits can be separately tested and in the case of a hierarchic design of integrated circuits, utilizing previously designed marco circuits and test programs for previously designed macro circuits, test development times can be substantially reduced; this is an increasingly important aspect of increasingly complex circuits.

REFERENCES:
patent: 4339819 (1982-07-01), Jacobson
patent: 4701921 (1987-10-01), Powell et al.
patent: 4701922 (1987-10-01), Kuboki et al.
patent: 4810958 (1989-03-01), Mogi et al.

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