Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-06-18
2001-06-12
Brier, Jeffery (Department: 2672)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
Reexamination Certificate
active
06246386
ABSTRACT:
TECHNICAL FIELD
The invention relates generally to liquid crystal display systems and more particularly to a liquid crystal display system capable of storing a complete frame of video data.
DESCRIPTION OF THE RELATED ART
Liquid crystal displays (LCDs) have become a popular form of electronic displays. LCDs are composed of liquid crystals which are positioned between two pieces of glass. The crystals can be aligned such that in a normal state, light easily propagates through the liquid crystals. However, when an electrical field is present, the liquid crystals alter their alignment, greatly reducing the amount of light passing through the crystals. By applying an electrical field at selected “pixels” or discrete regions on the LCD, an image can be formed. An LCD can have more than 1,228,800 pixels. The resolution of the LCD is directly related to the density of pixels in the LCD array.
There are a number of alternative types of liquid crystals utilized commercially in LCDs. A first major type is referred to as twisted nematic liquid crystals. LCDs with twisted nematic liquid crystals produce pictures with high contrast. However, LCDs with twisted nematic liquid crystals have relatively narrow viewing angles, as well as slow molecular rotation times. A second type of liquid crystals is referred to as ferroelectric liquid crystals. LCDs with ferroelectric liquid crystals have wider viewing angles as a result of their small cell gaps, typically 1 to 2 microns. In addition, ferroelectric liquid crystal displays (FLCDs) have a faster molecular rotation speed, typically in the range of 50 to 100 micro seconds.
A typical FLCD includes a display chip covered with a structure containing the ferroelectric liquid crystals, an illuminator and viewing optics. The operation of the FLCD is supported by a host computer and an external frame buffer memory. In order to display a color image on the FLCD, a frame of image data is transferred from the host computer to the external frame buffer memory. The external frame buffer memory supplies multi-bit pixel data to each pixel in the FLCD. The color image represented by the frame of pixel data is displayed on the FLCD as a result of a time sequential process of loading each pixel of the FLCD with its multi-bit pixel data from the external frame buffer memory. Typically, each pixel in the FLCD has a single bit storage element. Therefore, the external frame buffer memory must supply a series of single bits of pixel data to the pixels in order to display a particular color with a particular grayscale at each pixel. The number of bits required for each pixel of the FLCD to produce a desired color at a desired intensity may be 24 or more bits (e.g., three colors with eight bits of grayscale per color).
Depending upon the bits of the pixel data, light from the illuminator is either reflected to or deflected from the viewing optics. The pixels in the FLCD act as time-modulated micro mirrors in concert with the illuminator to produce the color image, which is determined by the values of the bits of pixel data. Quality of the color image is determined by the density of the pixels, the number of color-related bits delivered to each pixel, and the rate that each frame of color is refreshed. The quality of color image is practically limited by the rate of the transfer of pixel data from the frame buffer memory to the pixels.
To display a high quality color image on the FLCD having the single bit storage elements, a high bandwidth data link from the external frame buffer memory to the individual pixels is required. However, high bandwidth data links are expensive, potentially noisy, and require a great amount of power.
U.S. Pat. No. 4,432,610 to Kobayashi et al. (hereinafter Kobayashi) entitled “Liquid Crystal Display Device,” describes LCDs with various storage elements in the pixels. All of the storage elements described in Kobayashi are single-bit storage elements.
A concern with single-bit storage elements in an LCD relates to the need to continually supply bits of pixel data at a high data transfer rate to develop a high resolution image on the LCD. Unless a sufficiently high data transfer rate is achieved, there will be limitations on the size of the LCD array, the display frame rate, and/or the number of bits of pixel data that may be transferred per frame. These physical limits affect the quality of the display image.
Another LCD with single-bit storage elements is described in U.S. Pat. No. 5,471,225 to Parks entitled “Liquid Crystal Display with Integrated Frame Buffer.” The single-bit storage elements in the LCD of Parks are static random access memory (SRAM) cells comprised of three transistors and two resistors. The SRAM cells allow the LCD to display an image for an indefinite amount of time without refreshing. However, the data transfer rate concern identified above for the LCDs of Kobayashi exists for the LCD of Parks.
U.S. Pat. No. 5,627,557 to Yamaguchi et al. (hereinafter Yamaguchi) entitled “Display Devices,” describes an improved pixel for an LCD. The pixel includes circuitry for providing an inverse of the pixel data for DC balancing by using two dynamic sample-and-hold capacitors in addition to a single storage element. The DC balancing circuitry reduces the required data transfer rate from an external frame buffer memory to the pixels in the LCD by a factor of 2.
In another embodiment, Yamaguchi describes a pixel with the ability to display a first bit of pixel data while writing a second bit of pixel data. Each pixel in this embodiment functions as a pixel with a two-bit storage element, further reducing the necessary data transfer rate. However, the LCDs of Yamaguchi still require a relatively high data transfer rate, and potentially impose limitations relating to LCD size, frame rate, and color-related bits per pixel, as described above.
The high bandwidth requirement exists even when the device driving the LCD is in a “static” display mode. For example, a laptop computer for which an LCD displays a static (i.e., continuous) image of a portion of a word processing document requires a high data transfer rate to repeatedly supply identical pixel data to the LCD. A data transfer rate in the range of 100 Mega bits-per-second (bps) to more than 2 Giga bps may be required to maintain the image of the document.
What is needed is an LCD system having pixels with storage elements that relax the data rate and bandwidth requirements typically imposed by operation of an LCD device.
SUMMARY OF THE INVENTION
An integrated display device and a method of driving liquid crystal within a display area of the device include integrating memory cells within each pixel of the display device. Preferably, the memory cells allow read operations of pixel data to be isolated from write operations. This is achieved by providing dual port memory cells. Also in the preferred embodiment, the number of dual port memory cells within each pixel is equal to the number of bits of pixel data directed to the pixel per frame. That is, if a frame of pixel data includes eighteen bits of color and grayscale information, each pixel preferably includes an array of eighteen dual ported memory cells.
Each dual ported memory cell may be a dynamic random access memory (DRAM) cell formed by a write port, a storage element, and a series gated read port. The dual ported memory cell can be formed by a series connection of four devices, such as four transistors. Alternatively, the dual ported memory cell can be formed by a series connection of three devices and a capacitor, such as three transistors and a planar, a stacked, or a trench capacitor. In the four-transistor embodiment, one transistor functions as a capacitor to store a charge that is indicative of the value of a bit of the pixel data.
On one side of the storage device is a write access device that is manipulated during a write operation to connect the storage device to a write bit line from which the pixel data is received. Connected to the same storage device are two series connected read devices that are separately control
Agilent Technologie,s Inc.
Blackman Anthony J.
Brier Jeffery
LandOfFree
Integrated micro-display system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated micro-display system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated micro-display system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2535211