Integrated memory cube, structure and fabrication

Fishing – trapping – and vermin destroying

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437 53, 437206, 437208, 437209, H01L 2170

Patent

active

055630863

ABSTRACT:
An integrated memory cube structure and method of fabrication wherein stacked semiconductor memory chips are integrated by a controlling logic chip such that a more powerful memory architecture is defined with the functional appearance of a single, higher level memory chip. A memory/logic cube is formed having N memory chips and at least one logic chip, with each memory chip of the cube having M memory devices. The controlling logic chip coordinates external communication with the N memory chips such that a single memory chip architecture with N.times.M memory devices appears at the cube's I/O pins. A corresponding fabrication technique includes an approach for facilitating metallization patterning on the side surface of the memory subunit.

REFERENCES:
patent: 4983533 (1991-01-01), Go
patent: 5347428 (1994-09-01), Carson et al.

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