Integrated memory circuit of a series-parallel-series type

Details Integrated memory circuit of a series-parallel-series type Integrated memory circuit of a series-parallel-series type

1984-05-01

1986-07-08

Fears, Terrell W.

Static information storage and retrieval

Addressing

Byte or page addressing

365189, Q11C 1140

Patent

active

045997101

ABSTRACT:
In a series-parallel-series memory circuit (3) which requires a write clock signal (at 19), a transfer clock signal (at 25) and a read clock signal (at 31), it is sufficient, because a clock signal processing circuit (23) is provided, to apply only two clock signals (to 33 and 35). Using a gate circuit (41), it is possible to obtain from one clock signal (applied to 35) additional information, which is provided by means of pulse duration variation, for adapting the time delay of the memory circuit (FIG. 1).

REFERENCES:
patent: 3763480 (1973-10-01), Welmer

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