Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2005-04-19
2005-04-19
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S189011, C365S230030
Reexamination Certificate
active
06882554
ABSTRACT:
An integrated memory has row lines, column lines and column selection lines for activating read/write amplifiers. In each case, one group of a predetermined number of memory cells belongs to a row and a column address. Furthermore, the memory has a number of connecting pads corresponding to the predetermined number. Each memory cell in a group of memory cells is associated with one of the connecting pads. A control circuit for controlling the memory access is designed and can be operated such that, with a column address, it activates at least two different column selection lines. One of the column selection lines is activated for two or more column addresses. The delay times and the line lengths on the memory chip can thus be reduced in size.
REFERENCES:
patent: 5579280 (1996-11-01), Son et al.
patent: 5699300 (1997-12-01), Akamatsu et al.
patent: 5703822 (1997-12-01), Ikeda
patent: 6163498 (2000-12-01), Moon
patent: 6314035 (2001-11-01), Kitade et al.
patent: 20010026498 (2001-10-01), Dietrich et al.
Itoh, K. et al.: “Limitations and Challenges of Multigigabit DRAM Chip Design”, IEEE Journal of Solid State Circuits, vol. 32, No. 5, May 1997, pp. 624-634.
Dietrich Stefan
Hein Thomas
Kieser Sabine
Markert Michael
Schrögmeier Peter
Greenberg Laurence A.
Infineon - Technologies AG
Lebentritt Michael S.
Locher Ralph E.
Nguyen Dang T
LandOfFree
Integrated memory, and a method of operating an integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated memory, and a method of operating an integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated memory, and a method of operating an integrated... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3407059