Integrated LED driving device with current sharing for...

Electric lamp and discharge devices: systems – Periodic switch in the supply circuit – Plural load device systems

Reexamination Certificate

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Details

C315S194000, C315S297000, C315S291000, C315S315000, C315S312000, C363S089000, C363S021090, C362S800000

Reexamination Certificate

active

06621235

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to light-emitting diode (LED) drivers, and more particularly to an integrated LED driving device with current sharing for multiple LED strings in a DC mode and, alternately, with minimized phase delays in a PWM mode.
BACKGROUND OF THE INVENTION
Driving large scale LED drivers for a large amount N of LED strings (such as, without limitation, in LC-TV direct backlight) requires complex circuitry and expensive controllers. Moreover, with existing technology, when the multiple LED strings are operated in a PWM mode, time delay variations are present between the controllers, which could cause different phases among the N LED strings.
Referring now to
FIG. 1
, a schematic diagram of a conventional LED driving device
1
for a single LED string
8
is shown and includes a simple linear regulator
5
. Preferably, the LED string is driven with a specified constant current source which follows a constant reference current signal I
ref
at terminal
2
a
and a regulated DC input voltage source (NOT SHOWN), which delivers the DC input voltage V
DC
at terminal
3
. The linear regulator
5
functions in a manner which maintains a constant LED current I
LED
. The general operation of the linear regulator
5
will now be described in detail below.
The LED current I
LED
is sensed via a sensing resistor R
28
. Operational amplifier (OP-AMP) U
1
in combination with resistors R
25
and R
26
provides proper amplification so that the LED current I
LED
information is fed back to the negative or inverting terminal of the OP-AMP U
2
, the regulator's controller. Resistor R
25
is a feedback resistor coupled between the output terminal and the negative or inverting terminal of OP-AMP U
1
. Resistor R
26
is coupled to the negative or inverting terminal of OP-AMP U
1
and ground. The transfer function of OP-AMP U
2
is expressed as
R



22
R



23

1
1
+
sR



22

C



9
Eq
.


(
1
)
wherein s is a complex variable; resistor R
22
is a feedback resistor coupled between the output terminal and the negative or inverting terminal of OP-AMP U
2
; capacitor C
9
is coupled in parallel with the feedback resistor R
22
; and resistor R
23
has one terminal coupled to the negative or inverting terminal of OP-AMP U
2
and the other terminal coupled to node A. The positive or non-inverting terminal of OP-AMP U
2
receives the constant reference current signal I
ref
from terminal
2
a.
Referring still to the schematic diagram, node A of the linear regulator
5
also has one terminal of resistor R
21
coupled thereto and is adjacent to node B. The other terminal of resistor R
21
is coupled to the drain of transistor or metal-oxide semiconductor field-effect transistor (MOSFET) QA
1
. The gate of transistor or MOSFET QA
1
receives the constant reference current I
ref
from terminal
2
b
. The source of transistor or MOSFET QA
1
is coupled to ground. Node B has coupled thereto one terminal of capacitor C
8
and the cathode terminal of diode D
8
. The other terminal of the capacitor C
8
is coupled to ground. The anode of diode D
8
is coupled to the output terminal of OP-AMP U
1
.
A control output is generated at the output terminal of OP-AMP U
2
, the regulator's controller, and is coupled to the gate of transistor or MOSFET Q
1
via a RC lowpass filter
6
thereby providing the gate voltage V
GS
to the transistor or MOSFET Q
1
. The RC lowpass filter
6
comprises resistor R
24
and capacitor C
10
. The first terminal of resistor R
24
is coupled to the output terminal of OP-AMP U
2
and to a first terminal of capacitor C
10
. The second terminal of capacitor C
10
is coupled to ground.
The linear regulator
5
further includes resistor R
20
having one terminal coupled to the second terminal of resistor R
24
and to the drain of transistor or MOSFET QA
2
. The gate of transistor or MOSFET QA
2
is coupled to the output terminal of NOT gate NG
3
and the source of transistor or MOSFET QA
2
is coupled to ground. The input terminal of NOT gate NG
3
receives the constant reference current I
ref
from the terminal
2
b.
In operation, the drain-source current of transistor or MOSFET Q
1
, which is equal to I
LED
, is regulated to follow the constant reference current I
ref
. The linear regulator
5
in
FIG. 1
works very well for a DC or a pulse-width modulated (PWM) operated LED string
8
. However, when N LED strings, wherein each string includes a plurality of LEDs, are to be driven, simple duplication of the circuitry in
FIG. 1
is commonly used in order to achieve equal current sharing among the N LED strings. As can be appreciated, this increases the complexity of the circuitry and controller costs of the linear regulator. Moreover, if the LED strings are operated in a PWM mode, time delay variations between the duplicated controllers and linear regulators could cause different phases among the N LED strings.
SUMMARY OF THE INVENTION
An integrated LED driving device for multiple LED strings with automatic current sharing in a DC mode and, alternately, with minimized phase delays in a PWM mode. The integrated LED driving device employs a single linear regulator or other controller for controlling a reference current and a multiple-output current mirror, which includes a plurality of transistors or MOSFETs. Each of transistors or MOSFETs are integrated on the same substrate, with almost identical width-to-length channel ratios and with identical source and gate connections. Thereby, the multiple-output mirror provides for current sharing which is almost independent of the DC input voltage source, which provides the DC input voltage V
DC
, independent of the MOSFET's variation from the semiconductor integration process, and almost independent of temperature variation.


REFERENCES:
patent: 5495147 (1996-02-01), Lanzisera
patent: 5661645 (1997-08-01), Hochstein
patent: 6285140 (2001-09-01), Ruxton
patent: 6362578 (2002-03-01), Swanson et al.
patent: 6369525 (2002-04-01), Chang et al.
patent: 4326282 (1995-02-01), None
patent: 19950135 (2001-04-01), None

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