Integrated interpolator and method of operation

Details Integrated interpolator and method of operation Integrated interpolator and method of operation

1990-05-11

1992-05-12

Mai, Tan V.

Boots, shoes, and leggings

364786, G06F 738

Patent

active

051133628

ABSTRACT:
An interpolator circuit is formed from a chain of multiplexer/adder circuits. Each multiplexer/adder circuit selects one of the two multi-bit binary values which are to be interpolated in accordance with one bit of a multi-bit ratio value. The selected value is shifted and added to the output of a previous stage in the chain. When one of the two values is injected into the first stage, the final sum generated by the circuit chain is the interpolated value.

REFERENCES:
patent: 4639920 (1987-01-01), Kaneko
patent: 4718104 (1988-01-01), Anderson
patent: 4757465 (1988-07-01), Hakoopian et al.
patent: 4837722 (1989-06-01), Sara
patent: 4901266 (1990-02-01), Takagi
patent: 4951244 (1990-08-01), Meyer

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