Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2003-03-19
2009-06-23
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S531000, C257S664000, C257S758000, C257SE23170
Reexamination Certificate
active
07550854
ABSTRACT:
An explanation is given of an integrated interconnect arrangement having a plurality of interconnects that cross over one another at two crossover sections. By virtue of this measure, it is possible to achieve a uniform current flow in all three interconnects even at very high frequencies.
REFERENCES:
patent: 5559360 (1996-09-01), Chiu et al.
patent: 5962945 (1999-10-01), Krenzer et al.
patent: 6049308 (2000-04-01), Hietala et al.
patent: 6124624 (2000-09-01), Van Roosmalen et al.
patent: 6388188 (2002-05-01), Harrison
patent: 6987307 (2006-01-01), White et al.
patent: 197 27 758 (1998-10-01), None
patent: WO 98/43258 (1998-10-01), None
patent: WO 03/005381 (2003-01-01), None
Brinks Hofer Gilson & Lione
Infineon - Technologies AG
Parekh Nitin
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