Integrated injection logic with both fan in and fan out Schottky

Details Integrated injection logic with both fan in and fan out Schottky Integrated injection logic with both fan in and fan out Schottky

1975-12-24

1978-01-31

Larkins, William D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307317A, 357 15, 357 35, 357 36, 357 44, 357 46, 357 86, H01L 2704

Patent

active

040717747

ABSTRACT:
In the semiconductor device, a P.sup.- conductivity type semiconductor layer is formed on an N.sup.+ conductivity type semiconductor substrate by vapor phase growth technique, and a first N conductivity type region is formed in the P.sup.- conductivity type layer by diffusion to extend into the N.sup.+ conductivity type substrate and to surround a portion of the P.sup.- conductivity type semiconductor layer thereby isolating that portion from the remainder. A second conductivity type region is formed in the first region by diffusion and a third N conductivity type region is formed on the isolated region of the P.sup.- conductivity type layer. At least one metal region is bonded to the isolated region and at least one metal region is bonded to the third region to form respective metal-semiconductor contact diodes. The second region, the first region and the P.sup.- conductivity type layer constitute a lateral PNP transistor while the third region, the P.sup.- conductivity type semiconductor layer and the N.sup.+ conductivity type semiconductor substrate constitute a vertical NPN transistor.

REFERENCES:
patent: 3751680 (1973-08-01), Hodges
patent: 3823353 (1974-07-01), Berger et al.
patent: 3922565 (1975-11-01), Berger et al.
Berger, et al., "Schottky Transistor Logic", IEEE International Solid State Circuits Conf., Tech. Dig., pp. 172-173, (Feb. 1975).
Elmasry, Electronics Letters, 6 Feb. 1975, vol. 11, No. 3, pp. 63-64.
Blatt, et al., IEEE IEDM, Technical Digest, pp. 511-514, (Dec. 1974).

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