Integrated injection logic circuit with test pads on injector co

Details Integrated injection logic circuit with test pads on injector co Integrated injection logic circuit with test pads on injector co

1982-02-17

1984-12-18

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

324 73R, 357 85, 357 92, 377120, H03K 19091, H01L 2710, H01L 2970, G01R 1900

Patent

active

044892470

ABSTRACT:
An integrated injection logic circuit includes a plurality of integrated injection logic gates each having a PNP transistor for injector and NPN transistor for signal inversion, and an injector common line to which the respective injector PNP transistors are commonly connected. A test pad for electric probing is provided at least one location of the injector common line.

REFERENCES:
patent: 3746973 (1973-07-01), McMahon, Jr.
patent: 3781683 (1973-12-01), Freed
patent: 3808475 (1974-04-01), Buelow et al.
patent: 4178584 (1979-12-01), Davis
patent: 4348600 (1982-09-01), Jarrett et al.
patent: 4413271 (1983-11-01), Gontowski, Jr. et al.
Shultis, "Semiconductor Wafer Testing"; IBM. Tech. Discl. Bull.; vol. 13, No. 7, p. 1793; 12/1970.
Klein et al., "Chip Power Test Circuit"; IBM Tech. Discl. Bull.; vol. 22, No. 8A, pp. 3256-3257; 1/1980.

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