Integrated high frequency circuit for affecting the...

Wave transmission lines and networks – Attenuators

Reexamination Certificate

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C327S308000, C455S249100

Reexamination Certificate

active

06828873

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority of Application No. 101 30 764.3, filed Jun. 26, 2001, in Germany, the disclosure of which is expressly incorporated by reference herein.
FIELD OF THE INVENTION
The invention relates to an integrated high frequency (“HF”) circuit with attenuators for setting the amplitude of a reference signal, fed to the HF circuit, into an actual signal, generated in the HF circuit.
BACKGROUND OF THE INVENTION
In the conventional integrated high frequency circuits, whose purpose is to affect the amplitude of signals and which have, in particular, MESFET-based (metal semiconductor field effect transistor) or HEMT-based (high electron mobility transistor) switching elements, there are undesired phase variations of the signals. It is known to compensate for these undesired phase variations by using expensive circuits and algorithms. Such an integrated HF circuit, wherein the amplitude of the signals is affected by using non-compensated attenuators, is described in the article by Brian Bedard, “Fast GaAs MMIC Attenuator has 5-b Resolution,” Microwaves & RF, October 1991, pages 71-76. In patent document EP 0 360 916 A1, another attenuator without phase compensation is described.
In addition, conventional HF circuits need negative control voltages in order to set the respective operating states. Of course, the digital logic circuits, with which the HF circuits are driven, work with positive voltages. This factor is a drawback to the extent that the conventional HF circuits require two supply voltages. For this reason, additional interfaces, e.g., level converters, are required between the HF circuit and the digital logic circuit. There are also other drawbacks with respect to the space requirement on a microchip in which the HF circuit is integrated. Other drawbacks include the longer switching time, the high current consumption, and the high manufacturing costs.
In U.S. Pat. No. 5,796,286, an attenuator with two states of attenuation is described. The switching between the attenuation states is done by using field effect transistors (FETs), which can be switched into a conducting state and a blocking state. The FETs are driven by using a constant current source supplied by a positive supply voltage. The drawback of this method is a high current consumption by the attenuator. Other drawbacks are the high manufacturing costs and the large amount of space required by the attenuator.
SUMMARY OF THE INVENTION
An object of the invention is to provide an integrated HF circuit for affecting the amplitude of signals. The integrated HF circuit is phase compensated and can reduce the space requirement, the switching time, and the manufacturing costs of such an HF circuit on a microchip.
This object is addressed by the features of the integrated HF circuit with attenuators, exhibiting an input (E), an output (A) and field effect transistors, wherein the attenuators control, according to an attenuation state, which can be switched between two states, the amplitude of a reference signal applied to the input E and produce an actual signal at the output A. Advantageous designs of the HF circuit are presented herein.
According to one aspect of the present invention, the attenuators utilize inductors and/or capacitors for phase compensation. In addition, the field effect transistors may be driven without power. The advantage is that, in contrast to the prior art, there is no need for an additional interface between the digital logic circuit and the HF circuit. Thus, the switching time of the HF circuit of the invention may be significantly reduced. Further, the HF circuit of the invention requires less space on a microchip, thus reducing the manufacturing costs. Another advantage is that the integrated HF circuit of the invention may require only one supply voltage. Yet another advantage according to the invention is that since the field effect transistors in the attenuators may be driven without power, no current is consumed.
With the integrated HF circuit of the invention, the amplitude is set in fixed steps by using attenuators connected in series, preferably one after the other. The attenuators may be switched advantageously into the respective states, both with little loss (attenuation) and with defined loss. In this respect, the advantage is that a defined adjustment of the signal power or the signal amplitude can be achieved in several steps. For example, if all of the attenuators are switched into a state with minimum loss, the signal amplitude of the actual signal is the maximum.
In the individual attenuators, the inductors and/or the capacitors are wired together advantageously in such a manner that an undesired phase change of the reference signal, the signal to be affected is compensated for in the attenuator. Without additional measures, the passage phase of an individual attenuator is a function of the state of the circuit (little loss or defined loss). During changeover in the attenuator, the reference signal (the signal to be affected) experiences not only a change in amplitude, but also an undesired change in phase. The capacitors and/or inductors present in the HF circuit of the invention bring about additional phase changes, opposing the undesired phase changes and thus compensate for them.
The attenuators preferably exhibit attenuations of 0.5 dB, 1 dB, 2 dB, 4 dB, 8 dB, 16 dB. However, arbitrary binary division is also possible, e.g., 0.75 dB, 1.5 dB, 3 dB, 6 dB, etc., or 0.45 dB, 0.9 dB, 1.8 dB, 3.6 dB, 7.2 dB, etc. In addition, non-binary division can also be used, e.g., 0.71 dB, 1.27 dB, 2.26 dB, 4 dB, 7.2 dB, etc.
In particular, field effect transistors, which may be put into a conducting and blocking states by using an input voltage (also called gate voltage), serve as the switching elements. However, bipolar transistors may also be used that can be put into a conducting state when driven with small base currents. According to the invention, these switching elements have a positive supply voltage. This feature may be realized in particular by providing the attenuators with a positive voltage. The switching elements may be driven advantageously by using a positive digital level, in particular a TTL or CMOS level.
The order in which the individual attenuators are connected depends on the system considerations and hence may vary. Thus, it is possible in an advantageous design of the invention that additional stages of amplification are inserted between the attenuators. The stages of amplification cause the individual attenuators to uncouple and, thus, enable the undisturbed addition of individual states of attenuation in the respective attenuators. In addition, the stages of amplification have an advantageous impact on the noise factor and the drivability (compression point) of the integrated HF circuit.
To obtain an HF circuit with a low noise factor in an HF circuit, the attenuators having low attenuation values, e.g., 0.5 dB, 1 dB, 2 dB, may be interconnected between a first and a second amplifier, and attenuators having higher attenuation values can be connected behind the second amplifier.
The integrated HF circuit of the invention may be used in all applications in which the amplitude of the signals has to be affected, e.g., transmit receive (“T/R”) modules, controllable receivers, and modulators for communications. In particular, the HF circuit of the invention may be implemented with integrated technology, e.g., GaAs HEMT technology.
Other advantages of the integrated HF circuit of the invention include the simplification of the calibration expense in the transmit and receive case in active phased-array T/R modules. In addition, the actuation expense inside the module may be simplified.
Other objects, advantages, and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.


REFERENCES:
patent: 3924206 (1975-12-01), Fassett
patent: 4654610 (1987-03-01), Dasilva
patent: 4707639 (1987-11-

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