Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2007-06-05
2007-06-05
Andujar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S173000, C257S209000, C257S665000, C257S910000, C102S202400, C361S275100, C438S467000, C438S600000, C438S601000
Reexamination Certificate
active
10871569
ABSTRACT:
An integrated fuse has regions of different doping located within a fuse neck. The integrated fuse includes a polysilicon layer and a silicide layer. The polysilicon layer includes first and second regions having different types of dopants. In one example, the first region has an N-type dopant and the second region has a P-type dopant. The polysilicon layer can also include a third region in between the first and second regions, which also has a different dopant. During a fusing event, a distribution of temperature peaks around the regions of different dopants. By locating regions of different dopants within the fuse neck, agglomeration of the silicide layer starts reliably within the fuse neck (for example, at or near the center of the fuse neck) and proceeds toward the contact regions. An improved post fuse resistance distribution and an increased minimum resistance value in the post fuse resistance distribution is realized compared to conventional polysilicon fuses.
REFERENCES:
patent: 5708291 (1998-01-01), Bohr et al.
patent: 5854510 (1998-12-01), Sur et al.
patent: 6088256 (2000-07-01), Worley et al.
patent: 6323535 (2001-11-01), Iyer et al.
patent: 6337507 (2002-01-01), Bohr et al.
patent: 6525397 (2003-02-01), Kalnitsky et al.
patent: 6580156 (2003-06-01), Ito et al.
patent: 2002/0020886 (2002-02-01), Rockett
Technical Digest—International Electron Devices Meeting, Washington, D.C., Electron Devices Society of I.E.E.E., Dec. 7-10, 1997, “A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process,” Mobsen Alavi et al., pp. 34.3.1-34.3.4.
Technical Digest—International Electron Devices Meeting, Washington, D.C., Electron Devices Society of I.E.E.E., Dec. 5-8, 1999, “CoSi2 Integrated Fuses On Poly Silicon For Low Voltage 0.18 μm CMOS Applications,” Alexander Kalnitsky et al., pp. 31.7.1-31.7.4.
European Search Report for European Patent Application No. EP 03007698.9; dated Aug. 21, 2006; 3 pgs.
Chen Henry K.
Ito Akira
Andujar Leonardo
Broadcom Corporation
Sterne Kessler Goldstein & Fox PLLC
Wilson Scott R.
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