Integrated flash memory systems and methods for load...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030, C365S205000, C365S207000, C365S210110

Reexamination Certificate

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07852679

ABSTRACT:
Systems and methods are disclosed including features that compensate for variations in the magnitude of supply voltages used in memory arrays. According to some aspects, compensation circuits may provide a tunable current-limiting load for data columns, where the load can be tuned to dynamically compensate for variations in supply voltage. In certain aspects, a compensation circuit may employ an operational amplifier configured as a voltage follower. The voltage follower compensates for any variations in supply voltage, forcing a constant voltage drop across the load element(s), thus maintaining a constant load. Other circuits may also be included, such as precharge circuits, clamp circuits, buffer circuits, trimming circuit, and sense amplifier circuits with sensed body effect. System-On-Chip integrated system aspects may include a microcontroller, a mixed IP, and a flash memory system having functionality and blocks that interface and interoperate with each other for load compensation.

REFERENCES:
patent: 6282145 (2001-08-01), Tran et al.
patent: 6885600 (2005-04-01), Tran et al.
patent: 7342840 (2008-03-01), Tran
patent: 7405988 (2008-07-01), Tran et al.
patent: 7660161 (2010-02-01), Van Tran
patent: 2006/0067120 (2006-03-01), Drebinger
patent: 2008/0080235 (2008-04-01), Tran

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