Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – In combination with or also constituting light responsive...
Reexamination Certificate
2000-09-08
2003-06-24
Wille, Douglas A. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
In combination with or also constituting light responsive...
C257S080000, C257S081000, C372S050121
Reexamination Certificate
active
06583445
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to hybrid semiconductor assemblies that incorporate at least two dissimilar semiconductor devices. More specifically, the present invention relates to hybrid semiconductor modules incorporating at least one optoelectronic device and at least one electronic circuit (e.g. CMOS), methods for making the hybrid modules, and optoelectronic switching and interconnect assemblies incorporating the hybrid modules.
BACKGROUND OF THE INVENTION
Electronic circuits fabricated in silicon form the foundation of modern technology for communication and computing. Technologies for building optoelectronic devices such as semiconductor lasers and detectors as well as electrooptic modulators have advanced to a point where such devices are becoming major components of high performance communication and computing systems. It would be desirable to combine both the silicon electronic and the optoelectronic/electrooptic devices in a single unit in order to lower the cost as well as reduce the power and speed penalty incurred when these two devices are deployed in separately packaged units.
The vertical cavity surface-emitting laser (VCSEL) is an example of an optoelectronic device desirably integrated with CMOS circuitry. The VCSEL has emerged as a new light source alongside the conventional edge-emitting semiconductor laser. Advantages of the VCSEL include its compactness, inherent single-longitudinal mode operation, circular beam profile, low current threshold (as low as 20 &mgr;A), low power dissipation, and potential for integration with other electronic circuitry. Vertical-cavity lasers hold promise of superior performance in many optoelectronic applications and lower manufacturing cost than edge-emitting lasers. VCSELs are excellent light sources for optical data links. VCSELs are processed and tested at the wafer level, and one-dimensional or two dimensional arrays suitable for coupling to fiber optic ribbons or matrices are readily fabricated. Light is emitted perpendicular to the substrate with a circular beam that enables efficient, direct fiber or waveguide coupling. Particularly desirable are VCSELs emitting light of wavelength approximately 850-nm. Such VCSELs may be fabricated in high yield and are commercially available (e.g., Emcore Corp. MODE Division, Albuquerque, N.Mex.).
Furthermore, two-dimensional arrays of VCSELs can be imaged in free space using lenses or transmitted in two dimensional bundles of fibers (image guide) in order to implement optical interconnects, for example, highly parallel (thousands of channels) optical data links. Such applications have been analyzed theoretically (e.g., Louderback, et al., “Modulation and Free-Space Link Characteristics of Monolithically Integrated Vertical-Cavity Lasers and Photodetectors with Microlenses”,
IEEE Journal of Selected Topics in Quantum Electronics
, Vol. 5, No. 2, March/April 1999, pp. 157-165; Simonis, et al., “Research on VCSEL interconnects and OE processing at Army Research Laboratory”,
Proc. SPIE
, 3946, paper #28, SPIE Photonics West, San Jose, Calif., Jan. 22-28, 2000).
Metal-oxide semiconductor (MOS) technology is virtually the standard for digital circuits that are used for computers and telecommunications. Increasingly, CMOS (complementary MOS) technology is utilized in these applications. CMOS technology incorporates both n-channel MOS and p-channel MOS transistors in the same monolithic structure. No other approach can compare with the high device densities and high yields available with silicon CMOS technology.
High-density CMOS electronic circuits are typically made in silicon, while high performance optoelectronic devices are typically made in various optically active materials, such as compound semiconductors, most commonly III-V materials, especially GaAs, as well as II-VI semiconductors such as ZnSe, transparent ferroelectrics such as lithium niobate and other related oxide materials, and liquid crystal and other optoelectronic polymers.
Optoelectronic devices may be fabricated in epitaxial layers grown on suitable substrates which are not ordinarily silicon. For example, VCSELs are typically fabricated in AlGaAs and GaAs on GaAs substrates. Optoelectronic devices may also be fabricated in single crystal materials such as oxides.
Thus, it is necessary to find methods to combine the high density, high speed CMOS devices (typically made in silicon) with the optoelectronic devices (typically made in III-V materials) in an intimate fashion in order to minimize parasitic capacitance and inductance and to increase density of optical interconnects. Applications for such a capability include chip-to-chip communication through formation of transmitter, receiver and/or amplifier modules for optical fiber communication.
One approach to integrate Si and III-V materials is heteroepitaxial growth, that is the crystalline growth of one material on a dissimilar crystal substrate. Heteroepitaxial growth of GaAs on silicon, and silicon on GaAs have been explored. After decades of research, fundamental problems such as the mismatch in the crystal lattice constants and the difference in the coefficients of thermal expansion of the two materials have prevented this goal from being satisfactorily achieved. The limitations are particularly acute when high performance lasers, photodetectors or drive electronics are required.
Another approach is called epoxy casting, by which completely fabricated chips are mounted in a common epoxy cast and final metal deposited. This is a form of manufacturing commonly called multi-chip modules, or MCMs. This approach also has numerous problems, including high cost and poor parasitics, size, reliability and yield.
More recently, several approaches have been investigated that are based on a technique of flip-chip bonding. In this technique, a chip is flipped over and attached to a substrate or other chip by a solder joint. Hence, two dissimilar chips are brought into intimate electrical and mechanical contact with each other. For example, the flip-chip bonding technique has been used for combining low temperature long-wavelength infrared (IR) detector arrays with silicon readout circuitry. There are commercial machines that can perform this flip-chip bonding operation with great reliability and repeatability. For long-wavelength infrared (IR) detector arrays, the detector array substrate may be transparent to the infrared wavelengths being detected by the IR detector array, thus facilitating the optical coupling to a flip-chip mounted IR detector. However, for optical wavelengths less than approximately 1 &mgr;m, the detector substrate is often too opaque for use as a transparent substrate, so this technique cannot be used and hence the substrate needs to be removed for optical access to the OE devices.
Individual steps typically involved in heterogeneous bonding of OE devices may include the following:
1. Process the appropriate wafers to build electronic and optoelectronic devices;
2. Test, then separate out functional devices;
3. Interconnect electronic and optoelectronic devices by wire bonding, solder, flip-chip bonding, wafer bonding, etc.; and
4. Remove any substrates necessary to provide optical access to the optoelectronic device.
The order in which these operations are performed is often varied; and there are multiple variations on how to accomplish each step or series of steps. In one variation, the optoelectronics circuits are separated from their GaAs substrate as a very thin layer, then applied to a new substrate as a decal. This technique is very expensive and has numerous limitations on speed and design.
In a second variation, two wafers are bonded together and the backside of one of the wafers is removed by grinding and etching. Thickness control of the silicon film is difficult, and the cost is high. This technique is not suitable for attachment of a Si wafer to GaAs wafer due to the brittleness of GaAs.
In yet another variation, known good die of electronics and OE devices can each be assembled by flip-chip attach
Andreou Andreas G.
Apsel Alyssa
Athale Ravindra A.
Kalayjian Zaven
Pouliquen Philippe O.
Elliott Janet R.
Hultquist Steven J.
Peregrine Semiconductor Corporation
Wille Douglas A.
Yang Yongzhi
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