Patent
1982-11-03
1985-11-19
James, A.
357 22, 357 41, 357 42, H01L 2948, H01L 2980, H01L 2702, H01L 2956
Patent
active
045545693
DESCRIPTION:
BRIEF SUMMARY
FIGS. 1a and b show two versions of how the complementary field-effect transistors which are discussed below can be used to form a digital circuit, in this case an inverter. The circuit principle is known and is usually realized with transistors of MOS-type (metal-oxide-semiconductor). When A is high (close to the + voltage) then B is low (close to 0 or the -voltage), and conversely.
It is also known that the gate electrodes G, instead of consisting of a metal contact (or of a nearly metallically conducting polysilicon contact) on oxide, can consist of metal contacts directly on the semiconductor surface. The semiconductor can be silicon or GaAs, InP, InP.sub.1-x As.sub.x, In.sub.y Ga.sub.1-y As, etc. (x and y<1).
The new concept is to use, in a suitable way, two different metals (or nearly metallically conducting materials), with different Schottky barrier heights (defined here as to n-type material), one high, the other low, as contacts to the semiconductor. It is known that a low barrier gives a low-resistive contact to n-type semiconductor (in contrast to a high barrier contact which conducts very little), and that a high barrier gives a low-resistive contact to p-type semiconductor (in contrast to a low barrier contact which conducts very little.
The source- and drain-electrodes S and D in the diagrams of FIG. 1 shall in principle be low-resistive contacts to the semiconductor. For an n-channel transistor, the S- and D-connections are layers of the material with low Schottky barrier, below called the "low-metal". The layers are made by evaporation, sputtering, etc. and are patterned by suitable methods, e.g. using photolithographic methods. For a p-channel transistor S and D are made of the "high-metal". The gate electrodes (one or more) for the n-channel transistor are made of the "high-metal", for the p-channel transistor of the "low-metal". Different methods of constructing the transistors will be described below.
1. See FIG. 2.
The layer A with typical thickness 0.1-0.5 .mu.m consists of a suitably doped (often with ion-implantation) n-type semiconductor. The layer B can be a layer with considerably lower conductivity (for instance be the remaining part of an epitaxial layer A+B on the insulator saphire C; alternatively B can be a differently doped, for instance high-resistive p-type, part of the semiconductor). That part of the n-layer which is below G can in the extreme states be either depleted of free carriers (i.e. form a depletion layer) and then impede current flow between S and D, or have many free carriers; the transistor then conducts because of easy current transport between S and D. Because G is made from the "high-metal", a depletion layer with thickness X.sub.o is formed in the n-layer below, if G is connected (directly or via a resistor) to S. The current between S and D then becomes low. When a positive bias V.sub.forw. is applied to G relative to S, the depletion width decreases, and becomes smaller than the thickness of the A-layer, hence a conducting channel is formed between S and D. By choosing a "high-metal" with very high barrier, e.g. iridium with a barrier of approximately 0.9 electronvolts, X.sub.o can be large at the same time as the forward current j.sub.forw. to G ##EQU1## becomes small, even if V.sub.forw. is a few tenths of a volt. (For a barrier height .phi. of approximately 0.9 eV the current becomes of the order of 10.sup.-10 -10.sup.-9 A for a transistor with the channel-length l of .apprxeq.2 .mu.m and a channel width w of 300 .mu.m, for V.sub.forw. .apprxeq.0.3 V). The positive supply voltage + in FIG. 1 therefore can be several tenths of a volt, without the input A loading the output B of a preceding similar cell as that of FIG. 1, too much.
The p-transistor is constructed in a similar way to that shown in FIG. 2, but using a p-type layer A and with the L- and H-metals interchanged.
To form the CMES-cell in FIG. 1a, the n- and p-channel transistors are formed on different "islands" on the semiconductor whereby the islands are isolated from each other with a
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Bohlin Kjell
Norde Herman
Stolt Lars
Tove Per-Arne
Carroll J.
James A.
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