Patent
1988-09-12
1990-10-16
Sikes, William L.
357 71, H01L 2504
Patent
active
049639765
ABSTRACT:
A multiple phase electronic semiconductor package 10 including a stack of electrically conductive plates 12 with two opposed clamping plates 14, at least one interposed semiconductor component 16 and two side plates 18 flanking the stack. The height of the side plates 18 is a predetermined amount less than the combined height of the conductive plates 12 and semiconductor components 16. Threaded fasteners 20 secure the opposed clamping plates 14 to the side plates 18 causing the opposed clamping plates 14 to abut the side plates 18, and thereby creating a specific clamping force between the conductive plates 12 and semiconductor components 16.
REFERENCES:
patent: 3921201 (1975-11-01), Eisele et al.
Dishner Bryan W.
Fluegel Theodore D.
Sikes William L.
Sundstrand Corporation
Wise Robert E.
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