Integrated edge structure for high voltage semiconductor devices

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including isolation structure

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438309, 438335, 438357, 438358, H01L 21331

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058952497

ABSTRACT:
An integrated edge structure for a high voltage semiconductor device comprising a PN junction represented by a diffused region of a first conductivity type extending from a semiconductor device top surface is described. The edge structure comprises a first, lightly doped ring of the first conductivity type obtained in a first, lightly doped epitaxial layer of a second conductivity type and surrounding said diffused region, and a second, lightly doped ring of the first conductivity type, comprising at least one portion superimposed on and merged with said first ring, obtained in a second, lightly doped epitaxial layer of the second conductivity type grown over the first epitaxial layer.

REFERENCES:
European Search Report from European Patent Application Number 93830286.6, filed Jul. 1, 1993.
Patent Abstracts of Japan, vol. 6, No. 185 (E-132)(1063) Sep. 21, 1992 & JP-A57100744.

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