Integrated driver process flow

Details Integrated driver process flow Integrated driver process flow

2002-05-28

2004-07-27

Mulpuri, Savitri (Department: 2812)

Semiconductor device manufacturing: process

Including control responsive to sensed condition

C438S029000, C438S128000, C438S745000, C438S142000

Reexamination Certificate

active

06767751

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method of and an apparatus for integration of a light modulator and device drivers. More particularly, this invention is for monolithically integrating a diffractive light grating and associated device drivers on the same chip.
BACKGROUND OF THE INVENTION
A diffractive light grating is used to modulate an incident beam of light. One such diffractive light grating is a grating light valve. Device drivers provide control signals to the grating light valve which instruct the grating light valve to appropriately modulate the light beam incident thereto. The grating light valve is connected to the device drivers via wire bonds, where each wire bond is connected to one bond pad on the grating light valve and a corresponding bond pad on the device drivers. A conventional grating light valve assembly, as illustrated in
FIG. 1
, consists of a grating light valve chip
10
and four separate driver die
12
,
14
,
16
and
18
. Each driver die
12
,
14
,
16
and
18
is coupled to the grating light valve chip
10
by a plurality of wire bonds
11
. The grating light valve is built on its own process on silicon. The grating light valve includes moveable elements and each element is connected to a corresponding bond pad. The grating light valve is an essentially passive device where voltage is applied to make the elements move. In contrast, the device drivers are active. Each of the device drivers includes a plurality of transistors with appropriate layers of interconnects. The device drivers receive digital data and convert it to an analog response in the form of analog voltage. The analog voltage is then applied to the appropriate bond pad, which is then received by the corresponding element on the grating light valve. In this manner, the device drivers provide control signals to the grating light valve, thereby dictating the movement of the various elements.
In the field of light modulating devices, each element on the grating light valve corresponds to a pixel within the light modulating device. For example, in the case of 1088 pixels, 1088 wire bonds are needed as input to the grating light valve from the device drivers. 1088 wire bonds requires 272 bond pads on the output side of each of the four device drivers. However, it is much easier to perform high density wiring using standard semiconductor processing steps then it is to do wire bonding. Since only 60-70 wire bonds are necessary on the input side of each of the device drivers, it would be advantageous to internally wire the connections between the device drivers and the grating light valve on the same chip. In this manner, it would only be necessary to have the 60-70 wire bonds as inputs to this integrated chip, thereby eliminating the additional 1088 wire bonds of the conventional grating light valve assembly. By reducing the number of wire bonds, the manufacturing process is made easier. Further, fewer wire bonds reduces the packaging cost of each device. Still further, by eliminating the wire bonds between the device drivers and the grating light valve, types of device driver designs whose functionality and/or speed was previously limited by the parasitic capacitance of the wire bonds can now be used.
There is also a reliability problem associated with such a high number of wire bonds. Since there is a finite failure rate associated with each wire bond, the more wire bonds there are, the greater the chance that one of the wire bonds will fail. Reducing the number of wire bonds would necessarily reduce the number of failing wire bonds, and increase the reliability of the device.
Physically, each bond pad leaves a footprint. As such, the size of the grating light valve assembly is determined in great part by the total number of bond pads. If the number of bond pads is reduced, the size of the grating light valve assembly can also be reduced. As the device is bond pad limited, there is a significant amount of wasted real estate. Since this wasted real estate exists on silicon which can be used to manufacture the device drivers, the device drivers could be manufactured on the real estate currently being used by the bond pads.
Electro-static discharge (ESD) protection is usually incorporated into active devices ranging from diodes to transistors and integrated circuits. It is a matter of layout and design to add ESD protection structures to the pad during transistor fabrication on the integrated circuits. This protection prevents the circuitry from being damaged by ESD. However, since there is no active device on the grating light valve chip, there is no ESD protection. As a result, a significant amount of yield is lost during manufacturing of the grating light valves due to ESD induced “snap-downs.” In a snap-down, the pad on the grating light valve acts as an antenna and sees an ESD event. The ESD event is regarded as a voltage by the element on the grating light valve and the element is snapped down thereby destroying itself. It would be advantageous to incorporate ESD protection into the normal manufacturing process of the grating light valve.
Considering the above shortcomings, it is clear that if the device drivers are integrated onto the same silicon monolithically with the grating light valve, then this would produce a significant advantage.
Unfortunately, the manufacturing processes of the device drivers and the grating light valve are not the same. Further, by integrating the device drivers and the grating light valve onto the same silicon substrate, significant manufacturing problems are introduced.
Conventional transistor manufacturing processes are described below in relation to
FIGS. 2 and 3
.
FIG. 2
illustrates an exemplary transistor used in the device drivers of the grating light valve assembly. The transistor illustrated in
FIG. 2
is early in the manufacturing process and is often referred to as the front-end of the transistor. In a first step, silicon dioxide films
22
are grown on a silicon substrate
20
. Next, a gate
24
and source-drain
26
are added by manufacturing processes that are well known in the art of semiconductor fabrication. A next step, as illustrated in
FIG. 3
, is deposition of an oxide layer
30
over the front-end of the transistor. The oxide layer
30
is then planarized, typically by a chemical-mechanical polishing technique. Contact holes are then etched in the oxide layer
30
to access the gate
24
and the silicon substrate
20
, for example. Metalization is performed for the wiring of the device drivers. Metalization is typically performed by sputtering a metal layer over the oxide layer
30
, patterning and etching the metal layer to form contacts
32
and
34
.
Another oxide layer
36
is then deposited and planarized. Contact holes are etched in the oxide layer
36
to access the contacts
32
and
34
. Metalization is then performed to form the contacts
38
and
40
. Additional layers of oxide and metalization are added as determined by the design considerations of the device. Typically, there are 3-5 layers of metal which form the interconnects of the device drivers.
Conventional grating light valve manufacturing processes are described below in relation to
FIGS. 4-7
. The first step, as illustrated in
FIG. 4
, is the deposition of an insulating layer
51
followed by the deposition of a sacrificial layer
52
and a low-stress silicon nitride film
54
on a silicon substrate
56
.
In a second step, as illustrated in
FIG. 5
, the silicon nitride film
54
is lithographically patterned into a grid of grating elements in the form of elongated elements
58
. After this lithographic patterning process, a peripheral silicon nitride frame
60
remains around the entire perimeter of the upper surface of the silicon substrate
56
. After the patterning process of the second step, the sacrificial layer
52
is etched, resulting in the configuration illustrated in FIG.
6
. It can be seen that each element
58
now forms a free standing silicon nitride bridge. As can further be seen from
FIG. 6
, the sacrificial

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