Integrated double-chip semiconductor package and method for fabr

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

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257777, 257779, H01L 2302

Patent

active

055720684

ABSTRACT:
A multi-chip semiconductor package and a method for manufacturing such a package. The package includes a plurality of inner leads of a lead frame, upper and lower semiconductor chips electrically connected to upper and lower surfaces of said inner leads, respectively. The upper and lower chips each has a plurality of pads each having a solder formed thereon. The solder is connected to each inner lead by a soldering, thereby causing the upper and lower chips to be electrically connected to the inner lead, respectively. The method includes the steps of forming polyimide layers on opposite sides of surfaces of the semiconductor chips, forming solders on pads of the semiconductor chips, upon locating inner leads with respect to the solders in order to be disposed at a direction, connecting the inner leads to the solders, and upon superposing an overturned chip on another chip, performing an encapsulation epoxy to the chips in order to cause the chips to be connected to each other. The present invention provides a multi-chip semiconductor package having advantages of improving an integration of circuit and thus causing a desired thickness of the package to be accomplished.

REFERENCES:
patent: 4862322 (1989-08-01), Bickford et al.
patent: 4982265 (1991-01-01), Watanabe et al.
"Encapsulation Schemes for 04-Bonded Tab Packages" IBM Technical Disclosure vol. 33, No. 18, Mar. 1991, pp. 205-207.

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