Integrated delay line

Details Integrated delay line Integrated delay line

1989-10-04

1991-04-30

Callahan, Timothy P.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307594, 307246, 377 75, H03K 1716, H03K 17693

Patent

active

050121430

ABSTRACT:
A delay line, especially for delaying t.v. signals, includes a series of signal storage capacitances, an input line, an output line, selection transistors between the storage capacitances and the input and output lines and a digital shift register for activating the selection transistors. According to the invention, the output line comprises a central part, on either side of which signal storage capacitances with associated selection transistors are located, which in turn are located between the central part of the output line and the associated parts of the shift register. The design according to the invention results in a compact configuration, which has the advantage that the parasitic capacitance of the output line is comparatively low. The configuration can be readily extended to two interlaced delay lines having a single common shift register.

REFERENCES:
patent: 3986176 (1976-10-01), Weimer
patent: 4714924 (1987-12-01), Ketzler
patent: 4914319 (1990-04-01), Hashimoto

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