Integrated data jitter generator for the testing of...

Details Integrated data jitter generator for the testing of... Integrated data jitter generator for the testing of...

2007-06-12

2007-06-12

Ha, Dac V. (Department: 2611)

Pulse or digital communications

Testing

Phase error or phase jitter

C375S227000, C370S516000, C332S124000, C332S161000

Reexamination Certificate

active

10435405

ABSTRACT:
An integrated data jitter generator for the testing of high speed serial interfaces is provided. A transmit timing generator for use in a transmit data path includes a high frequency clock generator such as a phase-locked loop or a delay-locked loop having an input for receiving an oscillator or reference clock input. A clock modulator receives both an existing low frequency modulation signal and a high frequency modulation signal. A high-speed modulated clock signal is generated to enable jitter testing by a downstream-coupled receiver. Fixed frequencies such as 3, 6, 125, 150, 250, 300, 750, or 1500 MHz are used for the high-speed modulation signal, but any high-speed modulation frequency can be used to generate the desired amount of jitter. Likewise, the amplitude of the high frequency modulation signal can also be varied as desired.

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