Integrated cirucit package and method for fabrication thereof

Details Integrated cirucit package and method for fabrication thereof Integrated cirucit package and method for fabrication thereof

2011-08-23

2011-08-23

Pham, Thanh V (Department: 2894)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Having light transmissive window

C438S118000, C438S064000, C257S432000, C257S433000, C257S701000, C257S704000, C257SE31110, C257SE23193, C257SE23180

Reexamination Certificate

active

08003442

ABSTRACT:
The invention provides an integrated circuit package and method of fabrication thereof. The integrated circuit package comprises an integrated circuit chip having a photosensitive device thereon; a bonding pad formed on an upper surface of the integrated circuit chip and electrically connected to the photosensitive device; a barrier formed between the bonding pad and the photosensitive device; and a conductive layer formed on a sidewall of the integrated circuit chip and electrically connected to the bonding pad. The barrier layer blocks overflow of the adhesive layer into a region, on which the photosensitive device is formed, to improve yield for fabricating the integrated circuit package.

REFERENCES:
patent: 6777767 (2004-08-01), Badehi
patent: 2003/0124762 (2003-07-01), Hashimoto
patent: 2004/0099959 (2004-05-01), Tang
patent: 2005/0161805 (2005-07-01), Ono et al.
patent: 2006/0038250 (2006-02-01), Omori
patent: 2006/0079019 (2006-04-01), Kim
patent: 273686 (2007-02-01), None
patent: 200709373 (2009-03-01), None

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