Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1999-03-18
2000-07-18
Monin, Jr., Donald L.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257659, 257664, H01L 2348, H01L 2352, H01L 2940
Patent
active
060911506
ABSTRACT:
A semiconductor processing method of forming an electrically conductive interconnect line having an electrical conductive covering predominately coextensive therewith, includes, a) providing an conductive interconnect line over a first electrically insulating material, the line having a top and sidewalls; b) selectively depositing a second electrically insulating material layer over the interconnect line and the first insulating material in a manner which deposits a greater thickness of the second insulating material atop the interconnect line than a thickness of the second insulating material over the first insulating material; c) anisotropically etching the second insulating material layer inwardly to at least the first insulating material yet leaving second insulating material over the top and the sidewalls of the interconnect line; and d) providing an electrically conductive layer over the anisotropically etched second insulating layer to form a conductive layer which is predominately coextensive with the interconnect line over the etched second insulating material. The method further comprises provision of a base electrically conductive layer beneath the first insulating material, with the anisotropically etching step etching through the first insulating material to the base conductive layer, and the conductive layer being provided in electrical connection with the base conductive layer. Integrated circuitry produced by the method and other methods is also disclosed.
REFERENCES:
patent: 3169892 (1965-02-01), Lemelson
patent: 3759798 (1973-09-01), Graff et al.
patent: 4625391 (1986-12-01), Sasaki
patent: 4872947 (1989-10-01), Wang et al.
patent: 4877483 (1989-10-01), Bergemont et al.
patent: 4892753 (1990-01-01), Wang et al.
patent: 4892844 (1990-01-01), Cheung et al.
patent: 4894351 (1990-01-01), Batty
patent: 4997790 (1991-03-01), Woo et al.
patent: 5027176 (1991-06-01), Saika et al.
patent: 5126283 (1992-06-01), Pintchovski et al.
patent: 5271972 (1993-12-01), Kwok et al.
patent: 5319158 (1994-06-01), Lee et al.
patent: 5357138 (1994-10-01), Kobayashi
patent: 5378646 (1995-01-01), Huang et al.
patent: 5429969 (1995-07-01), Chang
patent: 5432128 (1995-07-01), Tsu
patent: 5436504 (1995-07-01), Charkravorty et al.
patent: 5473184 (1995-12-01), Murai
patent: 5497019 (1996-03-01), Mayer et al.
patent: 5498571 (1996-03-01), Mori et al.
patent: 5508233 (1996-04-01), Yost et al.
patent: 5510640 (1996-04-01), Shindo
patent: 5536681 (1996-07-01), Jang et al.
patent: 5539256 (1996-07-01), Mikagi
patent: 5592024 (1997-01-01), Aoyama et al.
patent: 5614439 (1997-03-01), Murooka et al.
patent: 5665643 (1997-09-01), Shin
patent: 5696386 (1997-12-01), Yamazaki
patent: 5910684 (1999-06-01), Sandhu et al.
Improved Sub-Micron Inter-Metal Dielectric Gap-Filling Using TEOS/Ozone APCVD, E.J. Korczynski & H. Shih, Microelectronics Manufacturing Technology, Jan. 1992, pp. 22-27.
Silicon Dioxide Deposition by Atmospheric Pressure and Low-Temperature CVD Using TEOS and Ozone, K. Fujino, Y. Nishimoto, N. Tokumasu, & K. Maeda, Electrochem. Soc., vol. 137, No. 9, Sep. 1990, pp. 2883-2887.
VLSI Multilevel Micro-Coaxial Interconnects for High Speed Devices, Michael E. Thomas, Irfan A. Saadat & Satoshi Sekigahama, CH2865-4/90/0000-0055, IEEE 1990, pp. IEDM 90 55-58.
Iyer Ravi
Sandhu Gurtej S.
Cao Phat Y.
Micro)n Technology, Inc.
Monin, Jr. Donald L.
LandOfFree
Integrated circuitry comprising electrically insulative material does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuitry comprising electrically insulative material, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuitry comprising electrically insulative material will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2039616