Integrated circuit with stacked MOS field effect transistors

Details Integrated circuit with stacked MOS field effect transistors Integrated circuit with stacked MOS field effect transistors

1989-12-22

1991-03-12

Larkins, William D.

357 42, 357 59, H01L 27092, H01L 2904

Patent

active

049996916

ABSTRACT:
A structure and method for making a pair of MOS field effect transistors (MOSFETs), one stacked upon the other in an integrated circuit device is disclosed. In one embodiment of the device, the active layer of the upper MOSFET is epitaxially grown from an exposed surface of the active layer of the lower MOSFET. In another embodiment, the active layer of the upper MOSFET is polysilicon which, optionally, may be recrystallized. In all embodiments, the pair of MOSFETs share a common gate.

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patent: 4603468 (1986-08-01), Lam
patent: 4628589 (1986-12-01), Sundaresan
Colinge et al, IEEE Trans. of Electron Devices, vol. ED29, No. 4, Apr. 1982, pp. 585-589.
Gibbons, IEEE Electron Device Letters, vol. EDL-1, No. 6, Jun. 1980, pp. 117-118.
Shah et al, Digest of Technical Papers, Symposium of VLSI Technology, pp. 8-9.

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